SCES463J June   2003  – January 2026 SN74LVC1G3157-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics 125C
    7. 5.7 Analog Channel Specifications
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

5.7 Analog Channel Specifications

over operating free-air temperature range (unless otherwise noted)
Parameter FROM (INPUT) TO (OUTPUT) TEST CONDITIONS vcc MIN NOM MAX UNIT
Frequency response (switch on)(1) A or Bn Bn or A RL = 50Ω, fin = sine wave 1.65V 300 MHz
2.3V 300
3V 300
4.5V 300
Crosstalk (between switches)(2) B1 or B2 B2 or B1 RL = 50Ω, fin = 10MHz (sine wave) 1.65V -54 dB
2.3V -54
3V -54
4.5V -54
Feed through attenuation (switch off)(2) A or Bn Bn or A CL = 5pF, RL = 50Ω, fin = 10MHz (sine wave) 1.65V -57 dB
2.3V -57
3V -57
4.5V -57
Charge injection S (Vs = VDD/2) A CL = 0.1nF, RL = 1MΩ 3.3V 3 pC
5V 7
Total harmonic distortion A or Bn Bn or A VI = 1.4Vp-p, Vbias = Vcc/2, RL = 10kΩ, fin = 600Hz to 20kHz (sine wave) 1.65V 0.5 %
VI = 2.0Vp-p, Vbias = Vcc/2, RL = 10kΩ, fin = 600Hz to 20kHz (sine wave) 2.3V 0.025
VI = 2.5Vp-p, Vbias = Vcc/2, RL = 10kΩ, fin = 600Hz to 20kHz (sine wave) 3V 0.015
VI = 4.0Vp-p, Vbias = Vcc/2, RL = 10kΩ, fin = 600Hz to 20kHz (sine wave) 4.5V 0.01
(1) Set fin to 0dBm and provide a bias of 0.4V. Increase fin frequency until the gain is 3dB below the insertion loss.
(2) Set fin to 0dBm and provide a bias of 0.4V.