2 Description

The ’AHCT138 3-line to 8-line decoders/demultiplexers are designed to be used in high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding.

Device Information

PART NUMBER	PACKAGE ⁽¹⁾	PACKAGE SIZE ⁽²⁾	BODY SIZE ⁽³⁾
SNx4AHCT138	RGY (VQFN, 16)	4mm x 3.5mm	4mm x 3.5mm
	N (PDIP, 16)	19.3 mm × 9.4 mm	19.32mm x 6.35mm
	D (SOIC, 16)	9.9 mm × 6 mm	9.90mm x 3.90mm
	NS (SOP, 16)	10.2mm x 7.8mm	10.20mm x 5.30mm
	DB (SSOP, 16)	6.2mm × 7.8mm	6.20mm x 5.30mm
	PW (TSSOP , 16)	5mm × 6.4mm	5.00mm x 4.40mm
	DGV (TVSOP, 16)	3.6mm x 6.4mm	3.6mm x 4.4mm

(1) For more information, see Mechanical, Packaging, and Orderable Information.

(2) The package size (length × width) is a nominal value and includes pins, where applicable

(3) The body size (length × width) is a nominal value and does not include pins.

Logic Diagram (Positive Logic)