The Input Port register (register 0) reflects the incoming logic levels of the pins, regardless of whether the pin is defined as an input or an output by the Configuration register. It only acts on read operation. Writes to these registers have no effect. The default value, X, is determined by the externally applied logic level. See Table 8-3.

Before a read operation, a write transmission is sent with the command byte to instruct the I²C device that the Input Port register will be accessed next.

The Output Port register (register 1) shows the outgoing logic levels of the pins defined as outputs by the Configuration register. Bit values in this register have no effect on pins defined as inputs. In turn, reads from this register reflect the value that is in the flip-flop controlling the output selection, not the actual pin value. See Table 8-4.

The Polarity Inversion register (register 2) allows polarity inversion of pins defined as inputs by the Configuration register. If a bit in this register is set (written with 1), the corresponding port pin's polarity is inverted. If a bit in this register is cleared (written with a 0), the corresponding port pin's original polarity is retained. See Table 8-5.

The Configuration register (register 3) configures the directions of the I/O pins. If a bit in this register is set to 1, the corresponding port pin is enabled as an input with high-impedance output driver. If a bit in this register is cleared to 0, the corresponding port pin is enabled as an output. See Table 8-6.

The Special Function register (register 0x50) configures the directions of the I/O pins. If P3 as INT is set to 1, the function of P3 will change to an INT output. If PU Disabled is set to 1, all the internal pull-up resistors on the P ports are disabled, this includes the P3 port if it's configured as an INT output. See Table 8-6.