2 Exposure of the SOIC-10 to Board Level Reliability Testing

The main challenge presented in the use of these two packages interchangeably is the layout of the respective land patterns. Figure 2-1 shows the typical land pattern of an SOIC-10 on the left, and the SOIC-16 on the right.

Figure 2-1 Land Patterns: SOIC-10 (Left), and SOIC-16 (Right)

As the land patterns show, while relatively similar in dimension and layout, the main solder points on the input side move from four individual solder pads, per input, to one elongated pad that the fused lead frame is then soldered to. However, in a use case where the goal is to use one device interchangeably with the other, it is simple to question whether the placement of the soldered fused leadframe on the individual pads can reduce performance. The placement of the individual leads on the elongated pad seems trivial. The four leads all share the same node of the input, and placed on the elongated solder pad results in no change to performance. However, the placement of the fused lead frame on the individual pads can cause bottlenecks in current flow resulting in additional heat.

To examine the effects of these concerns, a board level reliability experiment was conducted. For this experiment, our evaluation PCBs were populated with an SOIC-10 package onto a standard SOIC-16 footprint, shown in Figure 2-2.

Figure 2-2 SOIC-10 package on SOIC-16 Footprint

Eight of these PCBs were connected in series with 20A of current flowing through the leadframes continuously, and placed into an oven. During this the boards were subjected to temperature cycling from -40°C to +125°C and +125°C to -40°C for 500 cycles (see Figure 2-3).

Figure 2-3 Temperature Cycling Timing Diagram

Where:

• t₁ = t₃ = t₅ = 7 minutes
• t₂ = 45 minutes
• t₄ = 70 minutes

The speed of the ramp up and ramp down of the temperature is limited by the oven used, a Test Equity Model 115A. The boards were left to soak at -40°C and 125°C for seven minutes before moving onto the next cycle.

Both pre- and post- testing of these 500 cycles taking place, sample cards were examined from a thermal equilibrium perspective, as well as examination of the solder joints through x-ray to examine the effects these cycles can exhibit on the devices. Further, the cards were cross sectioned to look for evidence of delamination. There were no device failures during the temperature cycling.