SFFSA40 December   2024 OPA354A-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOT-23 | DBV Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOT-23 | DBV Package
    2. 4.2 Revision History

4.1 SOT-23 | DBV Package

Figure 4-1 shows the OPA354A-Q1 pin diagram for the SOT-23 | DBV package. For a detailed description of the device pins, see the Pin Configuration and Functions section in the OPA354A-Q1 data sheet.

Figure 4-1 Pin Diagram (SOT-23 | DBV) Package
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
OUT1Short to GND can cause device to overheat.B
V-2Normal operation, unless dual supply voltage is intended.D
+IN3Input at V- (GND) is valid input, however, desired application result is unlikely.C
-IN4Input at V- (GND) is valid input, however, desired application result is unlikely.C
V+5Diodes from input to V+ can turn on due to input signal and cause electrical overstress (EOS).A
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
OUT1Output can be left open. There is no effect on the device, but the output is not measured.C
V-2Lowest voltage output pin tries to power the V- pin of the device.B
+IN3Floating input, circuit likely does not function as expected.C
-IN4Floating input, circuit likely does not function as expected.C
V+5Highest voltage output pin tries to power the V+ pin of the device.B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure EffectsFailure Effect Class
OUT1V-Short to V- can cause device to overheat.B
V-2+INInput at V- (GND) is valid input, however, desired application result is unlikely.C
+IN3-INNo damage to device. Application circuit does not work. Pins are not adjacent to each other.C
-IN4V+Input at V+ is a valid input, however, desired application result is unlikely. Pins are not as near to each other, due to package type.B
V+5OUTShort to VS+ can cause device to overheat. Pins are not adjacent to each other.B
Table 4-5 Pin FMA for Device Pins Short-Circuited to V+
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
OUT1Short to V+ can cause device to overheat.B
V-2Diodes from input to V- can turn on due to input signal and cause electrical overstress (EOS).A
+IN3Input at V+ is a valid input, however, desired application result is unlikely.C
-IN4Input at V+ is a valid input, however, desired application result is unlikely.C
V+5Normal Operation.D