SFFSB39 February   2026 ISO6420

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 D-8 SOIC Package
    2. 2.2 DWV-8 Wide-SOIC Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 D-8 SOIC and DWV-8 Wide-SOIC Packages
  7. 5Revision History

4 Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the ISO6420 (D-8 SOIC and DWV-8 Wide-SOIC packages). See the following sections for pin FMA by package. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to ground
  • Pin open-circuited
  • Pin short-circuited to an adjacent pin
  • Pin short-circuited to supply

The pin FMA by pinout (see following sections) indicates how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
Class Failure Effects
A Potential device damage that affects functionality.
B No device damage, but loss of functionality.
C No device damage, but performance degradation.
D No device damage, no impact to functionality or performance.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • For short-to-ground analysis, the ground referenced for the short is the ground on that side of the isolation barrier.
  • For short-to-supply analysis, the supply referenced for the short is the supply on that side of the isolation barrier.
  • The default output levels for the outputs of OUTx are:
    • High for: ISO6420
    • Low for: ISO6420F