SLAA871 January   2019 AFE7422 , AFE7444

 

  1.   AFE74xx as a single-chip wideband repeater using loopback mode
    1.     Trademarks
    2. 1 Introduction
    3. 2 Repeater Mode (RX-TX Loopback With SerDes Bypassed)
      1. 2.1 Overview of the AFE74xx Repeater Mode
      2. 2.2 Configuration of the AFE74xx as a Repeater
      3. 2.3 Programming the Repeater Mode
        1. 2.3.1 Hardware Setup
        2. 2.3.2 Software Setup and GUI Configuration
    4. 3 130-MHz Digital Repeater System Overview
      1. 3.1 Key System Specifications
    5. 4 System Overview
      1. 4.1 Block Diagram
      2. 4.2 Design Considerations
      3. 4.3 Highlighted Products
        1. 4.3.1 LMK04828
      4. 4.4 System Design Theory
    6. 5 Hardware and Testing
      1. 5.1 Measured Latency and Gain
        1. 5.1.1 Hardware
        2. 5.1.2 Test Setup and Results
      2. 5.2 Measured Linearity Performance
        1. 5.2.1 Hardware and Test Setup
        2. 5.2.2 Test Results
      3. 5.3 Measured Selectivity (Out-of-Band Jammer)
        1. 5.3.1 Hardware and Test Setup
        2. 5.3.2 Test Results
    7. 6 Terminology

2.2 Configuration of the AFE74xx as a Repeater

The loopback feature emulates physically connecting the STX lanes to SRX lanes. To make sure the correct JESD decoding and coding is used, both receiver paths and transmitter paths within the device must be configured to the same JESD mode (that is, the same values for L, M, F, S, and K). The scrambler must either be enabled for both or disabled for both. Then program the SPI to switch to loopback mode. SYSREF is free running until this programming is done. Figure 1 shows a block diagram of the AFE74xx in repeater mode.

slaa871-repeater-mode-rx-tx-loopback-with-serdes-bypassed.gifFigure 1. Repeater Mode (RX-TX Loopback With SerDes Bypassed)

Data from the STX1 lane are looped back to the SRX1 lane, and then data from STX2 to SRX2, and so on. Lane mux of receiver path and transmitter path must be set to send the data from the STX lanes to the SRX lanes in the intended way.

The sync out from the JESD RX can be looped back to sync in of the JESD TX. To achieve this loopback, externally connect the LVDS sync out pin to the LVDS sync in pin. However, because there is no JESD physical layer involved, the loss of SYNC is not expected. Therefore, the JESD TX can be configured to ignore the SYNC request from sync in pin and send RX out data after SYNC is initially established.

The following summary lists the must-do items in order to use this repeater mode through the loopback with SerDes bypassed:

  • L, M, F, S, and K for both ADC and DAC must be same
  • Correct configuration of lane mux on both the RX and TX
  • Sync looped back externally