SLAAE76C March   2023  – May 2025 MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3106 , MSPM0G3107 , MSPM0G3505 , MSPM0G3506 , MSPM0G3507

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 MSPM0G Hardware Design Check List
  5. 2 Power Supplies in MSPM0G Devices
    1. 2.1 Digital Power Supply
    2. 2.2 Analog Power Supply
    3. 2.3 Built-in Power Supply and Voltage Reference
    4. 2.4 Recommended Decoupling Circuit for Power Supply
  6. 3 Reset and Power Supply Supervisor
    1. 3.1 Digital Power Supply
    2. 3.2 Power Supply Supervisor
  7. 4 Clock System
    1. 4.1 Internal Oscillators
    2. 4.2 External Oscillators
    3. 4.3 External Clock Output (CLK_OUT)
    4. 4.4 Frequency Clock Counter (FCC)
  8. 5 Debugger
    1. 5.1 Debug port pins and Pinout
    2. 5.2 Debug Port Connection With Standard JTAG Connector
  9. 6 Key Analog Peripherals
    1. 6.1 ADC Design Considerations
    2. 6.2 OPA Design Considerations
    3. 6.3 DAC Design Considerations
    4. 6.4 COMP Design Considerations
    5. 6.5 GPAMP Design Considerations
  10. 7 Key Digital Peripherals
    1. 7.1 Timer Resources and Design Considerations
    2. 7.2 UART and LIN Resources and Design Considerations
    3. 7.3 MCAN Design Considerations
    4. 7.4 I2C and SPI Design Considerations
  11. 8 GPIOs
    1. 8.1 GPIO Output Switching Speed and Load Capacitance
    2. 8.2 GPIO Current Sink and Source
    3. 8.3 High-Speed GPIOs (HSIO)
    4. 8.4 High-Drive GPIOs (HDIO)
    5. 8.5 Open-Drain GPIOs Enable 5V Communication Without a Level Shifter
    6. 8.6 Communicate With a 1.8V Device Without a Level Shifter
    7. 8.7 Unused Pins Connection
  12. 9 Layout Guides
    1. 9.1 Power Supply Layout
    2. 9.2 Considerations for Ground Layout
    3. 9.3 Traces, Vias, and Other PCB Components
    4. 9.4 How to Select Board Layers and Recommended Stack-up
  13. 10Bootloader
    1. 10.1 Bootloader Introduction
    2. 10.2 Bootloader Hardware Design Considerations
      1. 10.2.1 Physical Communication interfaces
      2. 10.2.2 Hardware Invocation
  14. 11Summary
  15. 12References
  16. 13Revision History

7.4 I2C and SPI Design Considerations

SPI and I2C protocols are widely used in communication between devices or boards, such as data exchange between an MCU and a sensor. The MSPM0G series MCU includes up to 32MHz high-speed SPI, and support 3-wire, 4-wire, chip select, and command mode. See Figure 7-6 to design a system based on specific requirements.

Some SPI peripheral devices need PICO (Peripherals Input Controller Output) to keep high logic. Add a pullup resistor to the PICO pin if the external device requires.

External Connections for Different SPI ConfigurationsFigure 7-6 External Connections for Different SPI Configurations

For I2C bus, the MSPM0G device supports standard, fast and fast plus mode, as shown in the Table 7-5.

External pullup resistors are required when using I2C bus. The value of these resistors depends on the I2C speed; TI recommends 2.2k to support fast plus mode. For systems concerned with power consumption, large resistor values can be used. ODIO (see GPIOs) can be used to implement communication with a 5V device.

Table 7-5 MSPM0G I2C Characteristics
PARAMETERSTEST CONDITIONSStandard modeFast modeFast mode plusUNIT
MINMAXMINMAXMINMAX
fI2CI2C input clock frequencyI2C in Power Domain02328322032MHz
fSCLSCL clock frequency0.10.41MHz
tHD,STAHold time (repeated) START40.60.26us
tLOWLOW period of the SCL clock4.71.30.5us
tHIGHHigh period of the SCL clock40.60.26us
tSU,STASetup time for a repeated START4.70.60.26us
tHD,DATData hold time000us
tSU,DATData setup time25010050us
tSU,STOSetup time for STOP40.60.26us
tBUFBus free time between a STOP and START condition4.71.30.5us
tVD;DATData valid time3.450.90.45us
tVD;ACKData valid acknowledge time3.450.90.45us
Typical I2C Bus ConnectionFigure 7-7 Typical I2C Bus Connection