SLAAE88D December   2022  – September 2025 MSPM0C1105 , MSPM0C1106 , MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3106 , MSPM0G3107 , MSPM0G3505 , MSPM0G3506 , MSPM0G3507 , MSPM0H3216 , MSPM0L1105 , MSPM0L1106 , MSPM0L1227 , MSPM0L1227-Q1 , MSPM0L1228 , MSPM0L1228-Q1 , MSPM0L1303 , MSPM0L1304 , MSPM0L1304-Q1 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346 , MSPM0L2227 , MSPM0L2227-Q1 , MSPM0L2228 , MSPM0L2228-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
    1. 1.1 Bootloader Concept
    2. 1.2 MSPM0 Bootloader Structure
      1. 1.2.1 ROM-Based BSL
      2. 1.2.2 ROM-Based BSL With Flash-Based Plug-In Interface
      3. 1.2.3 Flash-Based Secondary BSL
    3. 1.3 MSPM0 BSL Features and Demos Summary
  5. 2BSL Host Implementation Summary
  6. 3BSL Configuration in Non-Main (Configuration NVM)
    1. 3.1 Non-Main Introduction
    2. 3.2 Example – Disable PA18 BSL Invoke Pin With Sysconfig
  7. 4Bootloader Host
    1. 4.1 MCU Host Code Introduction
      1. 4.1.1 Hardware Connection
      2. 4.1.2 TXT to Header File Conversion
      3. 4.1.3 Step-by-Step Using the Demo
    2. 4.2 PC Host Example
      1. 4.2.1 Prepare the Image File and Password File
      2. 4.2.2 Steps to Using the GUI
  8. 5Bootloader Target
    1. 5.1 Default ROM-Based BSL
      1. 5.1.1 UART Interface
      2. 5.1.2 I2C Interface
    2. 5.2 Flash-Based Plug-In Interface Demos
      1. 5.2.1 UART Interface
        1. 5.2.1.1 Step by Step Using the Demo
        2. 5.2.1.2 How to Debug the Plug-In Interface Code
      2. 5.2.2 I2C Interface
      3. 5.2.3 SPI Interface
      4. 5.2.4 CAN Interface
    3. 5.3 Secondary BSL Demo
      1. 5.3.1 Flash-Based Secondary BSL Start From 0x1000
      2. 5.3.2 Flash-Based Secondary BSL Start From 0x0000
        1. 5.3.2.1 Flash-Based 0x0 Address BSL Demo for MSPM0C
        2. 5.3.2.2 Live Firmware Update
  9. 6Common Questions
    1. 6.1 Linker File Modification
    2. 6.2 Factory Reset by CCS to Recover Device
  10. 7References
  11. 8Revision History

1.2.1 ROM-Based BSL

MSPM0 L&G devices are shipped with a highly customizable ROM-based bootloader supporting UART and I2C.

The ROM-based BSL consist with BSL core and interface. The interface used to receive or send data packets between the host and target. The BSL core is used to interpret the packet data come from interface based on the protocol. Some of the parameters can be configured in non-main flash like BSL password or UART/I2C pins assignment.

ROM-Based BSL Structure Figure 1-3 ROM-Based BSL Structure