1 LDMOS and GaN Power Amplifier FET PA Basics

Most radio frequency (RF) antenna systems feature power amplifiers (PA) for their RF transmitter design. Many aerospace and space applications include antenna systems, such as:

• Radar
• Radar Imaging Payload
• Communications Payload
• Telemetry

PA biasing circuits are implemented in RF antenna systems to ensure two things. First, that the power output of the amplifier is known and controlled, and second, that the system is powered on and off safely to reduce the risk of damaging the PA. PAs are commonly designed with gallium nitride (GaN), gallium arsenide (GaAs), or laterally diffused MOSFET (LDMOS) transistors. Power output in both GaN and LDMOS FETs (field-effect transistors) is dependent on the current that flows through the device from the drain to the source (I_DS).

Figure 1-1 GaN and LDMOS FETs

I_DS is determined by a few variables: the drain voltage (V_DRAIN), the gate voltage (V_GS), and temperature. Figure 1-2 shows an example of I_DS values against the V_DRAIN for a selection of V_GS voltages for a GaN PA. The higher V_GS voltages result in a higher I_DS, or more power from the amplifier. When V_GS is sufficiently low, the PA allows virtually zero I_DS current. This V_GS voltage is called the pinch-off voltage. I_DS is also dependent on the V_DRAIN, but most designers do not vary the V_DRAIN. Instead, designers use optimized V_DRAIN voltages for the desired power levels. The V_DRAIN values are usually about 50 V for GaN PAs and 28 V for LDMOS PAs.

Figure 1-2 FET V_DRAIN, I_DS, and V_GS Behavior