SLAAET6 August   2025

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1S-Parameter Definition
    1. 1.1 Insertion Loss (S21)
    2. 1.2 Return Loss (S11)
  5. 2High-Speed Signal Design Example Of FPD-Link™ Serializer Body
    1. 2.1 Design Example Overview
    2. 2.2 Key Points in High-Speed FPD-Link Layout Design
  6. 3Factors Impacting Return Loss and Optimization Guidelines
    1. 3.1 Transmission Line Impedance Impact
    2. 3.2 AC Coupling Capacitor Landing Pad Impact And Optimization
      1. 3.2.1 Mitigation Strategy: Anti-Pad Implementation
      2. 3.2.2 Simulation Results With Ansys® HFSS
    3. 3.3 Through-Hole Connector Footprint Impact and Optimization
      1. 3.3.1 Through-Hole Connector Via Anti-Pad Impact
        1. 3.3.1.1 Simulation Results With Ansys® HFSS
      2. 3.3.2 Surrounding Ground Vias Impact
        1. 3.3.2.1 Simulation Results (Surrounding Ground Vias Impact)
      3. 3.3.3 Non-Functional Pad Impact
        1. 3.3.3.1 Simulation Results (Non-Functional Pad Impact)
    4. 3.4 Generic Signal Via Impact and Optimization
      1. 3.4.1 Simulation Results
    5. 3.5 ESD Diode Parasitic Capacitance Impact and Optimization
  7. 4Summary

3.4.1 Simulation Results

This section provides the simulation results of the generic signal via impact and optimization:

  • Figure 3-14 compares return loss (S11) performance across anti-pad radius (18–26 mil) and ground via spacing (26–42 mil).
  • Figure 3-15 shows the TDR impedance profiles with different via anti-pad size and ground vias spacing as a reference.

In this specific design example, the best possible combination is 18mil anti-pad and 26mil ground via spacing, which can achieve S11 < –30dB at 6.75GHz. This high-risk combination is large anti-pad (26mil) + wide spacing (42mil) causing S11 degradation to 14.7dB at 6.75GHz.

The key recommendations for a generic signal via include:

  • Implement a four-via quadrant configuration around the signal via to enhance return current path.
  • Select the best possible combination of anti-pad size and ground vias spacing based on simulation.
  • Remove the non-functional pads (NFPs) on unused layers.
Simulation Model For Generic Signal Via Figure 3-13 Simulation Model For Generic Signal Via
Return Loss (S11) With Different Via Anti-Pad Size and Ground Vias Spacing Figure 3-14 Return Loss (S11) With Different Via Anti-Pad Size and Ground Vias Spacing
TDR Impedance With Different Anti-Pad Size and Ground Vias Spacing Figure 3-15 TDR Impedance With Different Anti-Pad Size and Ground Vias Spacing