SLAU899 August   2023

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 EVM Setup and Operation
    2. 2.2 Pin Configuration of the ISOM8110 Single-Channel Opto-Emulator with Analog Transistor Output
  7. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layout and 3D Diagram
    3. 3.3 Bill of Materials
  8. 4Additional Information
    1.     Trademarks

3.3 Bill of Materials

Table 4-1 lists the bill of materials (BOM) for the ISOM8110DFGEVM.

Table 3-1 Bill of Materials
Item # Designator Manufacturer Description
1 C3 TDK CAP, CERM, 1uF, 50V, +/- 10%, X5R, 0603
2 H1, H2, H3, H4 3M Bumpon, Hemisphere, 0.44 X 0.20, Clear
3 J1 Phoenix Contact Conn Term Block, 2POS, 3.5mm, TH
4 J2, J3, J4 Samtec Connector Header Surface Mount 2 position 0.100" (2.54mm)
5 J5 Samtec Connector Header Surface Mount 4 position 0.100" (2.54mm)
6 J6 Phoenix Contact Terminal Block, 4x1, 2.54mm, Green, TH
7 Q1 Texas Instruments 3.75-kVRMS, Single-Channel Opto-Emulator with Transistor Output
8 R1, R3, R4 Panasonic RES, 1.00 k, 1%, 0.25 W, 0805
9 R2 Yageo America RES, 0, 5%, 0.125 W, 0805
10 SH-J1 Samtec Shunt, 100mil, Gold plated, Black
11 TP1, TP2, TP3, TP4, TP5, TP6, TP7, TP8 Keystone Test Point, Miniature, SMT
12 C1 Yageo America CAP, CERM, 15pF, 50V, +/- 5%, C0G/NP0, 0805
13 C2 MuRata CAP, CERM, 15pF, 50V, +/- 5%, C0G/NP0, AEC-Q200 Grade 1, 0603