SLAZ709A October   2017  – June 2025 MSP432E401Y , MSP432E411Y

 

  1.   1
  2. 1MSP432E4 SimpleLink™ Microcontrollers
    1. 1.1 Introduction
    2. 1.2 Device Nomenclature
    3. 1.3 Device Markings
    4. 1.4 Errata Overview
    5. 1.5 Errata Descriptions
      1.      ADC#13
      2.      ADC#14
      3.      EPI#01
      4.      GPIO#09
      5.      GPTM#09
      6.      GPTM#15
      7.      HIB#10
      8.      HIB#16
      9.      HIB#18
      10.      HIB#19
      11.      MEM#07
      12.      MEM#15
      13.      MEM#16
      14.      PWM#04
      15.      PWM#05
      16.      PWM#06
      17.      QEI#01
      18.      SSI#03
      19.      SSI#05
      20.      SSI#06
      21.      SSI#07
      22.      SSI#08
      23.      SYSCTL#03
      24.      SYSCTL#18
      25.      SYSCTL#24
      26.      USB#04
      27.      WDT#08
    6. 1.6 Appendix 1
    7. 1.7 Appendix 2
  3. 2Trademarks
  4. 3Revision History

SSI#08

SSI slave in bi and quad mode swaps XDAT0 and XDAT1

Description

The SSI Slave when in Bi or Quad Mode sends the data on XDAT0 to XDAT1 line and XDAT1 to XDAT0 line.

Workaround

When transmitting the data from SSI Slave in Bi and Quad Mode the CPU must swap the bits when writing to the Data Register SSIDR for the correct bit to be transmitted. When using uDMA CPU must write the swapped bits in the uDMA’s source buffer.