Description

EEPROM data may be corrupted if any of the following soft resets are asserted during an EEPROM program or erase operation:

• Software reset (SYSRESREQ)
• Software peripheral reset of the EEPROM module
• Watchdog reset (if configured as a system reset in the RESBEHAVCTL register)
• MOSC failure reset
• BOR reset (if configured as a system reset in the RESBEHAVCTL register)
• External reset (if configured as a system reset in the RESBEHAVCTL register)
• Writes to the HSSR register

Workaround

Ensure that any of the above soft resets are not asserted during an EEPROM program or erase operation. The WORKING bit of the EEDONE register can be checked before the reset is asserted to see if an EEPROM program or erase operation is occurring. Soft resets may occur when using a debugger and should be avoided during an EEPROM operation. A reset such as the Watchdog reset can be mapped to an external reset using a GPIO or Hibernate can be entered, if time is not a concern.