SLAZ709A October   2017  – June 2025 MSP432E401Y , MSP432E411Y

 

  1.   1
  2. 1MSP432E4 SimpleLink™ Microcontrollers
    1. 1.1 Introduction
    2. 1.2 Device Nomenclature
    3. 1.3 Device Markings
    4. 1.4 Errata Overview
    5. 1.5 Errata Descriptions
      1.      ADC#13
      2.      ADC#14
      3.      EPI#01
      4.      GPIO#09
      5.      GPTM#09
      6.      GPTM#15
      7.      HIB#10
      8.      HIB#16
      9.      HIB#18
      10.      HIB#19
      11.      MEM#07
      12.      MEM#15
      13.      MEM#16
      14.      PWM#04
      15.      PWM#05
      16.      PWM#06
      17.      QEI#01
      18.      SSI#03
      19.      SSI#05
      20.      SSI#06
      21.      SSI#07
      22.      SSI#08
      23.      SYSCTL#03
      24.      SYSCTL#18
      25.      SYSCTL#24
      26.      USB#04
      27.      WDT#08
    6. 1.6 Appendix 1
    7. 1.7 Appendix 2
  3. 2Trademarks
  4. 3Revision History

HIB#10

If MEMCLR is set to a nonzero value, a tamper event may not clear all of the bits in the HIBDATA register

Description

If the MEMCLR bit field in the HIB Tamper Control (HIBTPCTL) register is set to a non-zero value, the Hibernation Data (HIBDATA) register may not clear the specified bits. The MEMCLR bit field provides the option to clear all, the upper half, lower half, or none of the Hibernate memory on a tamper event.

Workaround

After clearing the tamper event by setting the TPCLR bit, the application should clear the data in the Hibernate memory in the HIBDATA register (write either the upper half, the lower half, or all of the bits to all zeros).