SLLA673 March   2025 MCF8315A , MCF8315C , MCF8315D , MCF8316A , MCF8316C-Q1 , MCF8316D

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 MCF8315 Block Diagram and Pin Functions Introduction
  5. 2Fan Application Hardware Architecture
    1. 2.1 Total Discrete Hardware Design
    2. 2.2 MCU+Pre-Driver and External FET Design
    3. 2.3 All in One Design
  6. 3MCF8315 Hardware Design Guide for Fan Application
    1. 3.1 MCF8315 Power Part Design
    2. 3.2 MCF8315 Function Part Design
    3. 3.3 MCF8315 Communication and Output Part Design
    4. 3.4 MCF8315 Schematic Design Reference
    5. 3.5 MCF8315 Simplifies Peripheral Design
    6. 3.6 MCF8315 Thermal Performance Test
      1. 3.6.1 MCF8315 TSSOP Thermal Test With Inductance Version
  7. 4Summary
  8. 5References

3.5 MCF8315 Simplifies Peripheral Design

The MCF8315 has an integrated hybrid-mode buck regulator that provides 3.3V or 5V regulated power to an external controller or system voltage rail. In addition, the buck output can be configured to 4V or 5.7V to support additional margin for external LDOs to generate 3.3V or 5V power. The buck output voltage is set by BUCK_SEL. However, in the absence of an additional MCU power rail, this inductor/resistor has no effect, but can generate additional material cost and PCB area. This article proposes a new design to optimize the design:

MCF8315 Power SequenceFigure 3-4 MCF8315 Power Sequence

According to the power rail architecture, this can be seen that the power rail of AVDD is provided by Vbuck or VM power supply. If the VBUCK circuit needs to be omitted, the buck regulator needs to be disabled, and BUCK_DIS = 1h (default 0h enables the buck regulator) and BUCK_CL = 1h (the buck regulator current limit is set to 150mA). At this time, the SW_BUCK pin can stop the PWM wave and limit the maximum current. Then set BUCK_PS_DIS = 1b. At this time, the AVDD power rail input path is VM->AVDD.

MCF8315 Power RailFigure 3-5 MCF8315 Power Rail

According to the power rail indicated in the specification, FB_BK has no voltage at this time, and DVDD is input through FB_BK, so DVDD has no power and the chip cannot work. The previous chapter mentioned that AVDD has a 20mA output capability, and we can connect AVDD to the FB_BK pin. If the FB_BK voltage drops to a low enough level to trigger the Under Voltage on the internal circuit.

At this stage, the power rail input path is changed to: VM->AVDD->FB_BK->DVDD.

The operation summary steps are as follows:

Table 3-5 Step to Simplify Peripheral Design
StepRegisterSettingComments
1BUCK_DIS1hBuck regulator disabled
2BUCK_CL1hBuck regulator current limit set to 150mA
3BUCK_PS_DIS1hBuck power sequencing disabled
4AVDD is routed to the FB_BK pin through the PCB. Avoid routing too long. Add a 1uf ground capacitor next to the FB_BK pin.
5BUCK_SEL0hBuck voltage set to 3.3V

Also, to reduce the loss between the input voltage and AVDD, an external LDO is also supported to be input to the FB_BK pin to reduce the power loss:

Table 3-6 Step to Simplify Peripheral Design with External LDO
StepRegisterSettingComments
1BUCK_DIS1hBuck regulator disabled
2BUCK_CL1hBuck regulator current limit set to 150mA
3BUCK_PS_DIS1hBuck power sequencing disabled
4External 3V3/5V LDO output to FB_BK pin, add 1uf capacitor to ground
5BUCK_SEL0hBuck voltage set to 3.3V

Reference Schematic:

Figure 3-6 show we can simplify peripheral design by conncet AVDD to FB_BK.

MCF8315 Simplifies Peripheral Design Schematic ReferenceFigure 3-6 MCF8315 Simplifies Peripheral Design Schematic Reference

Reference Layout:

MCF8315 Simplifies Peripheral Design Schematic Reference Figure 3-7 MCF8315 Simplifies Peripheral Design Schematic Reference

MCF8315 design 3D layout reference diagram: outer diameter 48mm, inner diameter clearance 26mm. The PCB peripheral design of this design occupies an area of ​​only 10mm x 20mmm

MCF8315 Simplifies Peripheral Design Layout 3D Picture Figure 3-8 MCF8315 Simplifies Peripheral Design Layout 3D Picture
Table 3-7 MCF8315 Simplifies Peripheral Design BOM
IDNameDesignatorFootprintQuantity
11uFC1,C2,C4,C5C06034
247nFC3C06031
3100nFC7C06031
410uFC6C12061
55.1kΩR1,R2R06032
6MCF8315DVPWPRU1HTSSOP-241

After updating the BOM table (excluding connectors) for comparison, only 7 necessary capacitors are needed to complete this design. This design can reduce the cost of peripheral components and reduce the layout of components while making sure the motor performance remains unchanged to the greatest extent. Of course, this can also introduce the problem of increased power consumption of the device.