SLLA682 July   2025 TDP142

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Device Configuration
  6. 3Equalization Selection
  7. 4Equalization Selection Example
  8. 5AUXP/N and SNOOPENZ Configuration
  9. 6Layout Guidelines
    1. 6.1 GND Stitching
    2. 6.2 AC-Coupling Capacitors
    3. 6.3 Layout Example
  10. 7Summary
  11. 8References

2 Device Configuration

The TDP142 supports configuration modes in GPIO and I2C Mode. Table 2-1 details 4-level control pin settings of TDP142. Table 2-2 details TDP142 mode configurations based on the pin setting. If the device is configured in GPIO mode, please refer to Table 2-2 for pin configurations to enable DisplayPort and AUX Snoop feature and Table 3-1 for DPEQ1 and DPEQ0 pin configuration to change equalization setting. Please refer to TDP142 DisplayPort™ 8.1 Gbps Linear Redriver, data sheet for configuration details and register mapping over I2C.

Table 2-1 4-Level Control Pin Settings
Level Settings
0 Option 1: Tie 1kΩ 5% to GND.
Option 2: Tie directly to GND.
R Tie 20kΩ 5% to GND.
F Float (Leave pin open)
1 Option 1: Tie 1kΩ 5% to VCC.
Option 2: Tie directly to VCC
Table 2-2 TDP142 Mode Configuration
I2C_EN Configuration
F I2C Enabled at 1.8V
1 I2C Enabled at 3.3V
0 GPIO Mode
Table 2-3 TDP142 GPIO Mode Configuration
DPEN/HPDIN SNOOPENZ/RSVD8 Configuration
1 - DisplayPort Enabled
0 - DisplayPort Disabled
- 1 AUX Snoop Enabled
- 0 AUX Snoop Disabled