SLLU312A July   2019  – May 2022 TCAN4550-Q1

 

  1.   TCAN4550-Q1 Functional Safety-Manual
  2.   Trademarks
  3. 1Introduction
  4. 2Product Functional Safety-Capability
  5. 3Product Overview
    1. 3.1 Block Diagram
    2. 3.2 Target Applications
      1. 3.2.1 Diagnostic Features
        1. 3.2.1.1 Mode Overview
        2. 3.2.1.2 Sleep Wake Error Timer (SWE)
        3. 3.2.1.3 Undervoltage
        4. 3.2.1.4 Thermal Shut Down
        5. 3.2.1.5 CAN Bus Communication
          1. 3.2.1.5.1 M_CAN
        6. 3.2.1.6 Processor Communication
          1. 3.2.1.6.1 SPI Integrity
            1. 3.2.1.6.1.1 SPI Scratchpad
            2. 3.2.1.6.1.2 SPIERR
            3. 3.2.1.6.1.3 M_CAN Forced Dominant and Recessive
            4. 3.2.1.6.1.4 SPI and FIFO
            5. 3.2.1.6.1.5 ECC for Memory
          2. 3.2.1.6.2 Timeout Watchdog
          3. 3.2.1.6.3 Floating Pins
          4. 3.2.1.6.4 RST Pin
          5. 3.2.1.6.5 Interrupt and Internal Fault Detection
  6. 4Development Process for Management of Systematic Faults
    1. 4.1 TI New-Product Development Process
  7. 5Revision History
3.2.1.6.4 RST Pin

The RST pin is a device reset pin. It has a weak internal pull down resistor for normal operation. If communication has stopped with the TCAN4550-Q1 the RST pin can be pulsed high and then back low for greater than tPULSE_WIDTH to perform a power on reset to the device. This resets the device to the default settings and puts the device into Standby mode. If the device was in Normal or Standby mode, the INH and nWKRQ pins remain active (on) and does not toggle; see Figure 3-10. If the device is in Sleep mode and reset is toggled, the device enters Standby mode and at that time INH and nWKRQ turns on; see Figure 3-11. This is considered SM-25.

After a RST has taken place a wait time of ≥ 700 µs should be used before reading or writing to the TCAN4550-Q1

GUID-433832E6-3BF2-4EE3-A67B-F6B2689A338B-low.gifFigure 3-10 Timing for RST Pin in Normal and Standby Modes
GUID-F8546906-9DB9-4985-99CD-D09E10A59D3F-low.gifFigure 3-11 Timing for RST Pin in Sleep Mode