Both inputs have parasitic impedance associated with them. Figure 5-6 shows a model where it is lumped into resistance and capacitance between each input terminal and ground and between the two terminals. There is also parasitic inductance, but the effects are negligible at low frequency.
Input impedance is a design issue when the source impedance is high. The input loads the source.
Also input capacitance will cause extra phase shift in the feedback path. This erodes phase margin and can be a problem when using high value feedback resistors.