SLOSEF6 May   2025 TRF1305A1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - AC Specifications in D2D Configuration
    6. 6.6 Electrical Characteristics - AC Specifications in S2D Configuration
    7. 6.7 Electrical Characteristics - DC and Timing Specifications
    8. 6.8 Typical Characteristics: D2D Configuration
    9. 6.9 Typical Characteristics: S2D Configuration
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fully Differential RF Amplifier
      2. 7.3.2 Output Common-Mode Control
      3. 7.3.3 Internal Resistor Configuration
    4. 7.4 Device Functional Modes
      1. 7.4.1 MODE Pin
        1. 7.4.1.1 Input Common-Mode Extension
      2. 7.4.2 Power-Down Mode
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Interface Considerations
        1. 8.1.1.1 Single-Ended Input
        2. 8.1.1.2 Differential Input
        3. 8.1.1.3 DC-Coupling Considerations
      2. 8.1.2 Gain Adjustment With External Resistors in a Differential Input Configuration
    2. 8.2 Typical Application
      1. 8.2.1 TRF1305A1 as ADC Driver in a Zero-IF Receiver
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Supply Voltages
      2. 8.3.2 Single-Supply Operation
      3. 8.3.3 Split-Supply Operation
      4. 8.3.4 Supply Decoupling
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Single-Ended Input

In the single-ended input configuration, one of the amplifier input pins is driven from a source while the other input is terminated with an external resistor. Figure 8-1 shows a dc-coupled, single-ended input configuration driven from and matched to a 50Ω source. Figure 8-1 shows how the non-driven INM pin is terminated with an external resistor to match to a source with the same 50Ω impedance at the INP pin.

RIN_SER in Figure 8-1 is typically 0Ω, and RTERM 50Ω. The performance curves shown in Section 6.9 are with input de-embedded up to device input pin, and output de-embedded up to device output pins. Hence, Sss11 shown in Section 6.9 represents input return loss looking into the amplifier input. The input return loss (Sss11) looking into RIN_SER can be improved by increasing the value of RIN_SER to 5Ω and RTERM to 55Ω. This improvement is shown in Figure 8-3, with a marginal trade-off in frequency flatness and noise figure as shown in Figure 8-2 and Figure 8-4 respectively.

TRF1305A1 DC-Coupled, Single-Ended Input
                    Matched to a 50Ω Source Figure 8-1 DC-Coupled, Single-Ended Input Matched to a 50Ω Source
TRF1305A1 Power Gain (Sds21) Against
                            RIN_SER, RTERM
At TA = 25℃, VS = 5V, input de-embedded up to RIN_SER
Figure 8-2 Power Gain (Sds21) Against RIN_SER, RTERM
TRF1305A1 Noise Figure (NF) Against
                            RIN_SER, RTERM
At TA = 25℃, VS = 5V, input de-embedded up to RIN_SER
Figure 8-4 Noise Figure (NF) Against RIN_SER, RTERM
TRF1305A1 Input Return Loss (Sss11)
                        Against RIN_SER, RTERM
At TA = 25℃, VS = 5V, input de-embedded up to RIN_SER
Figure 8-3 Input Return Loss (Sss11) Against RIN_SER, RTERM

Figure 8-5 shows how to configure the design in Figure 8-1 for single-ended, ac-coupled input by adding ac-coupling capacitors in series at the input and output.

TRF1305A1 AC-Coupled, Single-Ended Input
                    Matched to a 50Ω Source Figure 8-5 AC-Coupled, Single-Ended Input Matched to a 50Ω Source