SLUA560D June   2011  – March 2022 UCC28950 , UCC28950-Q1 , UCC28951 , UCC28951-Q1

 

  1.   Trademarks
  2. Design Specifications
  3. Functional Schematic
  4. Power Budget
  5. Transformer Calculations (T1)
  6. QA, QB, QC, QD FET Selection
  7. Selecting LS
  8. Output Inductor Selection (LOUT)
  9. Output Capacitance (COUT)
  10. Select FETs QE and QF
  11. 10Input Capacitance (CIN)
  12. 11Setting Up the Current Sense (CS) Network (CT, RS, RRE, DA)
  13. 12Voltage Loop and Slope Compensation
  14. 13Setting Turn-on Delays to Achieve Zero Voltage Switching (ZVS)
  15. 14Turning SR FETs-off Under Light Load Conditions
  16. 15600 W FSFB Detailed Schematic and Test Data
  17. 16References
  18. 17Revision History

Setting Up the Current Sense (CS) Network (CT, RS, RRE, DA)

The current sense transforer (CT) chosen for this design had a turn’s ratio (a2) of 100:1. This transformer was selected to attenenuate the T1's primary current for current sensing to reduce power disipation in the current sense resistor (RS) improving system efficency.

Equation 83. a 2 = I P I S = 100

Calculate nominal peak current (IP1) at VINMIN:

Peak primary current:

Equation 84. I P 1 = P O U T V O U T × η + Δ I L O U T 2 1 a 1 + V I N M A X × D M A X L M A G × 2 × f s 3.3   A

The voltage where peak current limit will trip.

Equation 85. V P = 2 V

Calculate current sense resistor (RS) and leave 200 mV for slope compensation:

Equation 86. R S = V P - 0.2 V I P E A K a 2 × 1.1 49.9   Ω

Select a standard resistor for RS:

Equation 87. R S = 48.7   Ω

Estimate power loss (PRS)for RS:

Equation 88. P R S = I P R M S 1 a 2 2 × R S 0.03   W

Calculate maximum reverse voltage (VDA) on DA:

Equation 89. V D A = V P × D C L A M P 1 - D C L A M P 29.8   V

Estimate DA power loss (PDA):

Equation 90. PDA=POUT×0.6VVINMIN×η×a20.01 W

Calculate RS reset resistor RRE:

Resistor RRE is used to reset the current sense transformer CT.

Equation 91. RRE=100×RS=4.87 kΩ

Resistor RLF and capacitor CLF form a low pass filter for the current sense signal (Pin 15). For this design we chose the following values. This filter has a low frequency pole (fLFP) at 482 kHz. This should work for most applications but maybe adjusted to suit individual layouts and EMI present in the design.

Equation 92. R L F = 1   k Ω
Equation 93. CLF=330 pF
Equation 94. fLFP=12πf×RLF×CLF=482 kHz

The current sense network dissipated roughly 0.04 W and had very little effect on the power budget.

Equation 95. PBUDGETPBUDGET-PRS-PDA5.96 W