3 Output Impedance Measurement of TPS62816

Figure 3-1 shows the output impedance measurement test setup. For more details regarding the impedance measurement method and different steps for a good calibration, refer to the How to Measure the Power Delivery Network Impedance of a DC-DC Converter.

Figure 3-2 shows the output impedance comparison when the loop is open $Z_o^{ol}\left(s\right)$ and when loop is closed $Z_o^{cl}\left(s\right)$ with a 500mΩ resistive load connected to GND at the output. The respective Phases are plotted in Figure 3-3.

Figure 3-2 Output Impedance Measurements Magnitude for TPS62816

Figure 3-3 Output Impedance Measurements Magnitude for TPS62816

For the open loop impedance, at low frequencies the impedance curve is influenced by the constant output resistance of 500mΩ. Above 10 kHz, the measured impedance tracks the impedance of the output capacitor bank, flattening out with its ESR value at 500 kHz. The far right part of the curve is dominated by the inductive behavior of the capacitance at very high frequencies.

For the closed loop impedance, at low frequencies a high DC loop gain value can be observed which results in a low output impedance. At higher frequencies, the measured impedance curve shows a similar behavior as in an open loop condition.

A particular characteristics of loop gain stability is that for the frequencies of interests the closed loop impedance is higher than the open loop. This behavior is due to control loop stability and can be observed between 100 kHz and 500 kHz. This specific frequency range will help us determine by calculation the phase margin as well as the crossover frequency of the TPS62816.

To facilitate further processing, a math function can be used to divide the open loop output impedance $Z_o^{ol}\left(s\right)$ by the closed loop output impedance $Z_o^{cl}\left(s\right)$:

Figure 3-4 Open Loop Impedance Divided by Closed Loop Impedance