SLUAB13 April   2025 UCG28826

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2VCC Self-Bias at Different AC Line and Load Conditions
  6. 3VCC Capacitor Configuration
  7. 465W AC-DC USB PD Charger Based on VCC Self-Biasing GaN Flyback
  8. 5Summary
  9. 6References

3 VCC Capacitor Configuration

Assume the condition that VCC voltage is slightly above the 5.6V threshold for triggering VCC charging (Assume VCC = 5.61V for example), and right after a zero-crossing event on the HV pin. In this case, calculate the capacitance required to make sure the VCC voltage does not drop below a survival level of 5.3V, which activates the HV charging path, before the next half-line cycle zero-crossing. As the quiescent current of UCG28826 in burst mode equals 250mA, the voltage drops from 5.6V to 5.3V in 10.6ms (half of 47Hz AC period), the VCC capacitance must be 8.83µF according to Equation 1

Equation 1. I = C × d V / d t

Accounting for DC voltage derating, temperature effects, and tolerance, a 10µF capacitor is the least capacitance to maintain VCC voltage regulation with the self-bias feature, or the VCC voltage drops below 5.3V in half AC line cycle and trigger random charging event when the HV pin goes high which can cause extra no load power consumption. As shown in Figure 3-1, when VCC capacitor is 4.7µF, the VCC charging frequency is random, and no load power consumption is 86mW in this case.

230VAC,47Hz, VCC=4.7uF, Open Load, 89mW Standby Power, CH3: HV CH4: VCC Figure 3-1 230VAC,47Hz, VCC=4.7uF, Open Load, 89mW Standby Power, CH3: HV CH4: VCC

VCC capacitance can increase to extend the time holding above the 5.3V in half AC cycle, so that the capacitance is less likely to charge VCC at AC zero-crossing. As shown in Figure 3-2, when VCC capacitor is 20µF, VCC charging frequency is 47Hz, and no load power consumption is 28mW.

230VAC, 47Hz, VCC=20uF, Open Load, 28mW Standby Power, CH3: HV CH4: VCC Figure 3-2 230VAC, 47Hz, VCC=20uF, Open Load, 28mW Standby Power, CH3: HV CH4: VCC

Table 3-1 lists the performance conclusion table with different VCC capacitors.

Table 3-1 Performance Conclusion Under Different CVCC
Test Condition CVCC VCC Charging Frequency No Load Power Consumption
230VAC, 47Hz, open load 4.7µF Random 86mW
230VAC, 47Hz, open load 20µF 47Hz 28mW
230VAC, 47Hz, open load 44µF 47/2=23.5Hz 27.2mW

To verify the accuracy of the test results, do not use a high capacitance probe on the HV pin or assert any larger resistor in series of the HV pin. In terms of the first case, given that the HV pin is characterized by high impedance, the presence of additional capacitance on this pin can impede the ability to discharge to approximately 0V during each half-cycle of the AC line. This interference can cause the IC to fail in synchronizing with the line frequency at the zero-crossing point. Consequently, the VCC charging process can occur irregularly at the HV pin voltage, leading to an increase in no-load power consumption. In terms of the second case, connecting a high-value resistor in series with the HV pin restricts the charging current to VCC during the AC zero-crossing phase. As a result, the charging of VCC can occur irregularly at higher input voltages once VCC falls below the 5.3V threshold required for survival mode, and can also lead to an increase in no-load power consumption.