2 Discrete VINDPM Auto-reset Circuit

The REGN pin voltage, VREGN, of the charger drops when VSYS falls below V_{SYS_SHORT}. The two 1MΩ resistors, pull-down resistor R_PD, p-channel MOSFET (PFET), n-channel MOSFET (NFET) and 0.33 to 1μF capacitor configured form the auto-reset circuit as shown in Figure 2-1. The VREGN drop triggers a V_INDPM threshold reset by momentarily disconnecting VACx from the panel, which collapses the charger's VACx pin voltage.

Figure 2-2 shows BQ25798 with the circuit above operating with no battery attached and a 4Ω resistor from SYS to GND. After each drop in simulated panel output voltage below the V_INDPM threshold but still above UVLO, the converter of the charger stops switching which causes VSYS and VREGN (CH2 in light blue) to collapse. The normally on NFET momentarily turns off then back on due to the capacitor that is coupled to REGN. This toggles the PFET that is pulled up to the solar panel voltage off then on, causing the VAC1 pin voltage to fail below UVLO then up to the new VOC voltage. The fast VAC1 toggle resets the V_INDPM threshold before the charger enters HiZ mode due to VSYS drop to ground.

Table 2-1 shows the specs for the FETs, coupling capacitor and pull-down resistor. The charger's V_INDPM(MIN) = 3.6V sets the minimum panel MPP voltage for operation.