SLUSEG7C December   2021  – October 2024 BQ77207

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Characteristics
    6. 6.6 Timing Requirements
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Voltage Fault Detection
      2. 7.3.2 Open Wire Fault Detection
      3. 7.3.3 Temperature Fault Detection
      4. 7.3.4 Oscillator Health Check
      5. 7.3.5 Sense Positive Input for Vx
      6. 7.3.6 Output Drive, COUT and DOUT
      7. 7.3.7 The LATCH Function
      8. 7.3.8 Supply Input, VDD
    4. 7.4 Device Functional Modes
      1. 7.4.1 NORMAL Mode
      2. 7.4.2 FAULT Mode
      3. 7.4.3 Customer Test Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Design Requirements
      2. 8.1.2 Detailed Design Procedure
        1. 8.1.2.1 Cell Connection Sequence
    2. 8.2 Systems Example
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VDD Supply voltage (1) 5 38.5 V
VIN Input voltage range of Vn - Vn-1 where n = 2 to 7 and V1 - VSS 0 5 V
TS 0 1.5 V
VCTM Customer Test Mode Entry VDD > V7 + VCTM 12 13 V
CTS Total capacitance on the TS Pin 200 pF
TA Ambient temperature –40 85 °C
TJ Junction temperature –65 150 °C
(1) VDD is equal to top of stack voltage.