SLVAFT9 June 2024 TPS61022 , TPS61023
When using 6 solar cells, the MPP of the PV panle is about approximately 2.9V, so we define the VPV_UVLO_rise=2.9V and VPV_UVLO_fall=2.2V.
As shown in Figure 3-2, the generic hysteresis control can be realized by building the external circuit consisting of several resistors and PNP transistor Q1. VPV is the supply voltage of PV panel, and VOUT is the output voltage of DC/DC converter, which is regulated to about 4.2V by divider resistors on FB pin.
The operation scheme of the circuit works as follow:
At first, when sunlight is weak, the output voltage of PV panel is much lower than the maximum output power point operation voltage, the collector-base voltage is decided by R3 and R4, defined by Equation 1. If Vcb at this time is lower than the threshold voltage (VBE(ON)) of the PNP transistor Q1, Q1 is turned off then the EN pin is connected to ground by REN, TPS61023 is disabled.
When sunlight becomes stronger, the output voltage of PV panel is rising, and the Vcb is higher than the threshold voltage (VBE(ON)) of the PNP transistor Q1, Q1 is turned on and then the EN pin is pull up to VPV. The voltage of VIN pin is decided by R1 and R2, and defined by Equation 2. When VIN voltage is higher than the UVLO rising threshold voltage, the TPS61023 is enabled to charge the battery.
Then when the sunlight becomes weak again, Q1 is turned off again and the EN pin is pulled down to GND by REN. TPS61023 is disabled, and the charge phase stops.
Where
The circuit is verified in Figure 3-3, the VPV is supplied with an adjustable power supply, VOUT is connected to a Li-ion with 3.6V remaining voltage. When VPV is rising and higher than 2.9V, TPS61023 is turned on and outputs current to charge the battery. When VPV is falling and lower than 2.2V, TPS61023 is turned off and stops output current.