Figure 3-1 shows four eFuses with 20A individual over current threshold connected in parallel to share 80A load current in a 58V server voltage rail. During steady-state operation, the current sharing is decided by the R_DS(on) mismatch among the parallel-connected eFuse devices. The device that has the lowest drain to source resistance (R_{DS(on)_min}) shares the highest current (IMAX) than the rest of the devices. Realistic path impedances are introduced as shown in Table 3-1 to show the current distribution in eFuse.

Current through each eFuse can be calculated by using Equation 2.

Figure 3-1 eFuse Devices Connected in Parallel with Individual Over Current Limit to Support 80A Load Current

As per effective resistance and current distribution shown in Table 3-2, eFuse_1 can be seen taking more than 20A current which trips the first eFuse, and subsequently trips the other connected eFuses in parallel. Hence, system gets shutdown much below 80A.

Limitations

To mitigate eFuse inaccuracy, system designers must choose between:

1. Overdesigning the Power Supply (PSU)

   Increasing the system trip threshold to accommodate potential eFuse errors results in an oversized power supply unit (PSU), leading to wasted resources, higher production costs, increased power consumption, reduced system efficiency and the need for additional components such as more eFuses in parallel to make sure of safe operation.

2. Limiting System Performance

   Capping the load below the system trip threshold to prevent false tripping. Artificially limiting system capabilities to accommodate eFuse inaccuracy which leads to lower system throughput and inferior performance.