SLVS350K October   2002  – June 2025 TPS795

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Shutdown
      2. 6.3.2 Start-Up
      3. 6.3.3 Undervoltage Lockout (UVLO)
      4. 6.3.4 Regulator Protection
      5. 6.3.5 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input and Output Capacitor Requirements
        2. 7.2.2.2 Load Transient Response
        3. 7.2.2.3 Output Noise
        4. 7.2.2.4 Dropout Voltage
        5. 7.2.2.5 Programming the TPS79501 Adjustable LDO Regulator
      3. 7.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Board Layout Recommendation to Improve PSRR and Noise Performance
        2. 7.5.1.2 Regulator Mounting
        3. 7.5.1.3 Thermal Considerations
        4. 7.5.1.4 Estimating Junction Temperature
      2. 7.5.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Modules
        2. 8.1.1.2 Spice Models
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.5.1.4 Estimating Junction Temperature

Using the thermal metrics ΨJT and ΨJB, as shown in Thermal Information, the junction temperature can be estimated with corresponding formulas (given in Equation 7). For backwards compatibility, an older θJC,Top parameter is also listed.

Equation 7. TPS795

where

  • PD is the power dissipation shown by Equation 6
  • TT is the temperature at the center-top of the device package
  • TB is the PCB temperature measured 1 mm away from the device package on the PCB surface (see Figure 7-8)
Note:

Both TT and TB can be measured on actual application boards using a thermo‐gun (an infrared thermometer).

For more information about measuring TT and TB, see the Using New Thermal Metrics application note, available for download at www.ti.com.

As shown in Figure 7-7, the new thermal metrics (ΨJT and ΨJB) have little dependency on board size. That is, using ΨJT or ΨJB with Equation 7 is a good way to estimate TJ by simply measuring TT or TB, regardless of the application board size.

TPS795 ΨJT and ΨJB vs Board SizeFigure 7-7 ΨJT and ΨJB vs Board Size

For a more detailed discussion of why TI does not recommend using θJC(top) to determine thermal characteristics, see the Using New Thermal Metrics application note, available at www.ti.com.

For further information, see the IC Package Thermal Metrics application note, also available on the TI website.

TPS795 Measuring Point for TT and TBFigure 7-8 Measuring Point for TT and TB