SLVSGD3B December   2022  – August 2024 TPS281C30

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SNS Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Device Functional Modes
      1. 8.3.1 Working Mode
    4. 8.4 Feature Description
      1. 8.4.1 Accurate Current Sense
        1. 8.4.1.1 High Accuracy Sense Mode
      2. 8.4.2 Programmable Current Limit
        1. 8.4.2.1 Short-Circuit and Overload Protection
        2. 8.4.2.2 Capacitive Charging
      3. 8.4.3 Inductive-Load Switching-Off Clamp
      4. 8.4.4 Inductive Load Demagnetization
      5. 8.4.5 Full Protections and Diagnostics
        1. 8.4.5.1 Open-Load Detection
        2. 8.4.5.2 Thermal Protection Behavior
        3. 8.4.5.3 Undervoltage Lockout (UVLO) Protection
        4. 8.4.5.4 Overvoltage (OVP) Protection
        5. 8.4.5.5 Reverse Polarity Protection
        6. 8.4.5.6 Protection for MCU I/Os
        7. 8.4.5.7 Diagnostic Enable Function
        8. 8.4.5.8 Loss of Ground
        9. 8.4.5.9 Enhanced EFT Immunity
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 IEC 61000-4-5 Surge
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Selecting RILIM
        2. 9.2.2.2 Selecting RSNS
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 EMC Considerations
      2. 9.4.2 Layout Example
        1. 9.4.2.1 PWP Layout without a GND Network
        2. 9.4.2.2 PWP Layout with a GND Network
        3. 9.4.2.3 RGW Layout with a GND Network
      3. 9.4.3 Thermal Considerations
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

6.2 ESD Ratings

VALUE UNIT
VESD Electrostatic discharge Human body model (HBM), per
ANSI/ESDA/JEDEC JS-001(1)		 All pins except VS and VOUT ±2000 V
Human body model (HBM), per
ANSI/ESDA/JEDEC JS-001(1)		 VS and VOUT with respect to GND ±4000 V
Charged device model (CDM), per JEDEC
specification JESD22-C101, all pins(2)		 All pins ±750 V
V(ESD4) Electrostatic discharge Contact discharge, per IEC 61000-4-2 (4) VS and VOUT ±8000 V
V(EFT) Electrostatic discharge Electrical fast transient, per IEC 61000-4-4, version E (3) VS and VOUT ±2500 V
V(surge) Electrostatic discharge Surge protection with 42 Ω, per IEC 61000-4-5; 1.2/50 μs (4) VS and VOUT ±1000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) Tested with application circuit and supply voltage (VS) of 24-V, ENx pins High (Output Enabled) and and EN pins Low (Outputs Disabled). 2.5kV is rated for 100pF coupling capacitor, 10nF output capacitor at the output. The max EFT voltage level will change with different coupling capacitor and output capacitor used.
(4) Tested with application circuit and supply voltage (VS) of 24-V, ENx pins High (Output Enabled) and and EN pins Low (Outputs Disabled)