SLVSHN2A August   2024  – February 2026 DRV8962-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Diagrams
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1  Overview
    2. 6.2  Functional Block Diagram
    3. 6.3  Feature Description
    4. 6.4  Independent Half-bridge Operation
    5. 6.5  Current Sensing and Regulation
      1. 6.5.1 Current Sensing and Feedback
      2. 6.5.2 Current Sensing with External Resistor
      3. 6.5.3 Current Regulation
    6. 6.6  Charge Pump
    7. 6.7  Linear Voltage Regulator
    8. 6.8  VCC Voltage Supply
    9. 6.9  Logic Level Pin Diagram
    10. 6.10 Protection Circuits
      1. 6.10.1 VM Undervoltage Lockout (UVLO)
      2. 6.10.2 VCP Undervoltage Lockout (CPUV)
      3. 6.10.3 Logic Supply Power on Reset (POR)
      4. 6.10.4 Overcurrent Protection (OCP)
      5. 6.10.5 Thermal Shutdown (OTSD)
      6. 6.10.6 nFAULT Output
      7. 6.10.7 Fault Condition Summary
    11. 6.11 Device Functional Modes
      1. 6.11.1 Sleep Mode
      2. 6.11.2 Operating Mode
      3. 6.11.3 nSLEEP Reset Pulse
      4. 6.11.4 Functional Modes Summary
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Driving Solenoid Loads
        1. 7.1.1.1 Solenoid Driver Typical Application
        2. 7.1.1.2 Thermal Calculations
          1. 7.1.1.2.1 Power Loss Calculations
          2. 7.1.1.2.2 Junction Temperature Estimation
        3. 7.1.1.3 Application Performance Plots
      2. 7.1.2 Driving Stepper Motors
        1. 7.1.2.1 Stepper Driver Typical Application
        2. 7.1.2.2 Power Loss Calculations
        3. 7.1.2.3 Junction Temperature Estimation
      3. 7.1.3 Driving Brushed-DC Motors
        1. 7.1.3.1 Brushed-DC Driver Typical Application
        2. 7.1.3.2 Power Loss Calculation
        3. 7.1.3.3 Junction Temperature Estimation
        4. 7.1.3.4 Driving Single Brushed-DC Motor
      4. 7.1.4 Driving Thermoelectric Coolers (TEC)
      5. 7.1.5 Driving Brushless DC Motors
    2. 7.2 Package Thermal Considerations
      1. 7.2.1 Thermal Performance
        1. 7.2.1.1 Steady-State Thermal Performance
        2. 7.2.1.2 Transient Thermal Performance
      2. 7.2.2 PCB Material Recommendation
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Bulk Capacitance
      2. 7.3.2 Power Supplies
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Electrical Characteristics

Typical values are at TA = 25°C and VVM = 24V. All limits are over recommended operating conditions, unless otherwise noted.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
POWER SUPPLIES (VM, DVDD)
IVMVM operating supply currentnSLEEP = 1, No load, VCC = External 5V47mA
nSLEEP = 1, No load, VCC = DVDD69
IVMQVM sleep mode supply currentnSLEEP = 038μA
tSLEEPSleep timenSLEEP = 0 to sleep-mode120μs
tRESETnSLEEP reset pulsenSLEEP low to clear fault2040μs
tWAKEWake-up timenSLEEP = 1 to output transition0.851.2ms
tONTurn-on timeVM > UVLO to output transition0.851.3ms
VDVDDInternal regulator voltageNo external load, 6V < VVM < 60V4.7555.25V
No external load, VVM = 4.5V4.354.45

V

CHARGE PUMP (VCP, CPH, CPL)
VVCPVCP operating voltage6V < VVM < 60VVVM + 5V
f(VCP)Charge pump switching frequencyVVM > UVLO; nSLEEP = 1360kHz
LOGIC-LEVEL INPUTS (IN1, IN2, IN3, IN4, EN1, EN2, EN3, EN4, MODE, OCPM, nSLEEP)
VILInput logic-low voltage00.6V
VIHInput logic-high voltage1.55.5V
VHYSInput logic hysteresis (all pins except nSLEEP)100mV
VHYS_nSLEEP

nSLEEP logic hysteresis

300mV
IILInput logic-low currentVIN = 0V–11μA
IIHInput logic-high currentVIN = DVDD50μA
t1ENx high to OUTx high delayINx = 12μs
t2ENx low to OUTx low delayINx = 12μs
t3ENx high to OUTx low delayINx = 02μs
t4ENx low to OUTx high delayINx = 02μs
t5INx high to OUTx high delay600

ns

t6INx low to OUTx low delay600ns
CONTROL OUTPUTS (nFAULT)
VOLOutput logic-low voltageIO = 5mA0.35V
IOHOutput logic-high leakage–11μA
MOTOR DRIVER OUTPUTS (OUT1, OUT2, OUT3, OUT4)
RDS(ONH)High-side FET on resistanceTJ = 25 °C, IO = -5A5362mΩ
TJ = 125 °C, IO = -5A70101mΩ
TJ = 150 °C, IO = -5A80112mΩ
RDS(ONL)Low-side FET on resistanceTJ = 25 °C, IO = 5A5362mΩ
TJ = 125 °C, IO = 5A70101mΩ
TJ = 150 °C, IO = 5A80112mΩ
tRFOutput rise/fall timeIO = 5A, MODE = 1, between 10% and 90%70ns
IO = 5A, MODE = 0, between 10% and 90%140ns
tDOutput dead timeVM = 24V, IO = 5A300ns
CURRENT SENSE AND REGULATION (IPROPI, VREF)
AIPROPICurrent mirror gain212μA/A
AERRCurrent mirror scaling error10% to 20% rated current-88%
20% to 40% rated current-55
40% to 100% rated current-3.53.5
IVREFVREF Leakage CurrentVREF = 3.3V50nA
tOFFPWM off-time17μs
tDEGCurrent regulation deglitch time0.5μs
tBLKCurrent Regulation Blanking time1.5μs
tDELAYCurrent sense delay time2μs
PROTECTION CIRCUITS
VUVLOVM UVLO lockoutVM falling4.14.234.35V
VM rising4.24.354.46
VCCUVLOVCC UVLO lockoutVCC falling2.72.82.9V
VCC rising2.82.923.05
VUVLO,HYSUndervoltage hysteresisRising to falling threshold120mV
VCPUVCharge pump undervoltageVCP fallingVVM + 2V
IOCPOvercurrent protectionCurrent through any FET8A
tOCPOvercurrent detection delay2.2μs
tRETRY

Overcurrent retry time

4.1ms
TOTSDThermal shutdownDie temperature TJ150165180°C
THYS_OTSDThermal shutdown hysteresisDie temperature TJ20°C