SLVUC05A November   2020  – July 2022 TPS25750

 

  1.   Read This First
    1.     About This Manual
    2.     Notational Conventions
    3.     Glossary
    4.     Related Documents
    5.     Support Resources
    6.     Trademarks
  2. 1Introduction
    1. 1.1 Introduction
      1. 1.1.1 Purpose and Scope
    2. 1.2 PD Controller Host Interface Description
      1. 1.2.1 Overview
      2. 1.2.2 Register and Field Notation
    3. 1.3 Unique Address Interface
      1. 1.3.1 Unique Address Interface Protocol
      2. 1.3.2 Unique Address Interface Registers
  3. 2Unique Address Interface Register Detailed Descriptions
    1. 2.1  0x03 MODE Register
    2. 2.2  0x0D DEVICE_CAPABILITIES Register
    3. 2.3  0x14 - 0x19 INT_EVENT, INT_MASK, INT_CLEAR Registers
    4. 2.4  0x1A STATUS Register
    5. 2.5  0x26 POWER_PATH_STATUS Register
    6. 2.6  0x29 PORT_CONTROL Register
    7. 2.7  0x2D BOOT_STATUS Register
    8. 2.8  0x30 RX_SOURCE_CAPS Register
    9. 2.9  0x31 RX_SINK_CAPS Register
    10. 2.10 0x32 TX_SOURCE_CAPS Register
    11. 2.11 0x33 TX_SINK_CAPS Register
    12. 2.12 0x34 ACTIVE_CONTRACT_PDO Register
    13. 2.13 0x35 ACTIVE_CONTRACT_RDO Register
    14. 2.14 0x3F POWER_STATUS Register
    15. 2.15 0x40 PD_STATUS Register
    16. 2.16 GPIO Events
    17. 2.17 0x69 TYPEC_STATE Register
    18. 2.18 0x70 SLEEP_CONFIG Register
    19. 2.19 0x72 GPIO_STATUS Register
  4. 34CC Task Detailed Descriptions
    1. 3.1 Overview
    2. 3.2 PD Message Tasks
      1. 3.2.1 'SWSk' - PD PR_Swap to Sink
      2. 3.2.2 'SWSr' - PD PR_Swap to Source
      3. 3.2.3 'SWDF' - PD DR_Swap to DFP
      4. 3.2.4 'SWUF' - PD DR_Swap to UFP
      5. 3.2.5 'GSkC' - PD Get Sink Capabilities
      6. 3.2.6 'GSrC' - PD Get Source Capabilities
      7. 3.2.7 'SSrC' - PD Send Source Capabilities
    3. 3.3 Patch Bundle Update Tasks
      1. 3.3.1 'PBMs' - Start Patch Burst Mode Download Sequence
      2. 3.3.2 'PBMc' - Patch Burst Mode Download Complete
      3. 3.3.3 'PBMe' - End Patch Burst Mode Download Sequence
      4. 3.3.4 Patch Burst Mode Example
      5. 3.3.5 'GO2P' - Go to Patch Mode
    4. 3.4 System Tasks
      1. 3.4.1 'DBfg' - Clear Dead Battery Flag
      2. 3.4.2 'I2Cr' - I2C Read Transaction
      3. 3.4.3 'I2Cw' - I2C Write Transaction
  5. 4User Reference
    1. 4.1 PD Controller Application Customization
    2. 4.2 Loading a Patch Bundle
  6. 5Revision History

2.16 GPIO Events

Table 2-36 GPIO Events
Event # Event Name I/O Description
76 PdNegotiationInProcess Output When in source mode, this GPIO is asserted after a Request message is received, before sending the Accept message. The GPIO is de-asserted after the PS_RDY message is sent.When in sink mode, this GPIO is asserted right before sending a Request message, and de-asserted after a PS_RDY message is received.In either mode, the GPIO is de-asserted when a detach occurs.
75 AttachedAsSink Output When the PD controller has a port that is connected to a Source, this GPIO will be asserted. The GPIO is de-asserted upon disconnect, hard reset, during power-role swap only if none of the ports in the PD controller are connected to a source.
73 EnableSource Output When the PD controller sends an Accept message to start sourcing VBUS under a high-power contract this GPIO is asserted high. It will remain high as long as the high-power contract is active. If the contract transitions from a high-power contract to a low-power contract, this GPIO will have a high-to-low transition after the PS_Rdy message is sent.
71 Reserved
69 MRESET Input Upon a rising edge on this GPIO the PD controller will drive a rising edge on the RESETZ GPIO after a delay . Upon a falling edge on this GPIO the PD controller will drive a falling edge on the RESETZ GPIO after a delay .
68 RESETZ Output This works in conjunction with MRESET.
67 Fault_Condition_Active_Low_Global Output Asserts low on an overcurrent event on Port .
61 Dp_Dm_Mux_Enable_Event Output This GPIO must be used to enable/disable a USB 2.0 D+/D- mux. The GPIO is driven high upon connection, and low upon disconnect.
52 VCONN_On_Event Output This GPIO is asserted when PP_CABLE1 is enabled.
50 Debug_Accessory_Mode_Event Output Output: This GPIO is asserted high when a Debug Accessory is attached.
48 Audio_Mode_Event Output Output: This GPIO is asserted high when an Audio Accessory (Ra/Ra) is attached.
45 Prevent_DRSwap_To_UFP_Event Input When the GPIO is high, the PD controller will reject any DR_Swap messages from the Port Partner requesting to change the data-role from DFP to UFP.
44 UFP_Indicator_Event Output The GPIO is driven high when the data role of any port in the PD controller is UFP.
43 Barrel_Jack_Event Input When this GPIO is high, the PD controller interprets it to mean that a barrel-jack adaptor is connected and the system has power. Therefore, when this event is triggered, it will clear the dead-battery flag and attempt to perform a Power Role Swap to be a Source.
42:36 Reserved
35 Fault_Condition_Active_Low_Event Output Asserts low on an overcurrent event.
33 Fault_Input_Event Input When set low by the system, Port1 enters the Type-C Error Recovery State. When set high, no action is taken.
32:30 Reserved
29 UFP_DFP_Event Output Output: Asserted high when Port1 is operating as UFP. Asserted low when port is operating as DFP.
28:14 Reserved
13 SourcePDOContractBit2 Output Output: Bit2 of binary encoded outputs indicating when a Source PDO1 through PDO7 has been negotiated (the Accept message has been transmitted and the tSrcTransition timer has expired).
12 SourcePDOContractBit1 Output Output: Bit1 of binary encoded outputs indicating when a Source PDO1 through PDO7 has been negotiated (the Accept message has been transmitted and the tSrcTransition timer has expired).
11 SourcePDOContractBit0 Output Output: Bit0 of binary encoded outputs indicating when a Source PDO1 through PDO7 has been negotiated (the Accept message has been transmitted and the tSrcTransition timer has expired).
10 SourcePDO4Contract Output Output: Asserted high when a Source PDO4 has been negotiated (the Accept message has been transmitted and the tSrcTransition timer has expired). D-asserted when a PDO other than PDO2 has been negotiated.
9 SourcePDO3Contract Output Output: Asserted high when a Source PDO3 has been negotiated (the Accept message has been transmitted and the tSrcTransition timer has expired). D-asserted when a PDO other than PDO2 has been negotiated.
8 SourcePDO2Contract Output Output: Asserted high when a Source PDO2 has been negotiated (the Accept message has been transmitted and the tSrcTransition timer has expired). D-asserted when a PDO other than PDO2 has been negotiated.
7 SourcePDO1Contract Output Output: Asserted high when a Source PDO1 has been negotiated (the Accept message has been transmitted and the tSrcTransition timer has expired). D-asserted when a PDO other than PDO1 has been negotiated.
6:4 Reserved
3 Cable_Orientation_Event Output Output: Indicates the plug orientation. Low when the plug is connected upside-up (CC1 connected to CC in cable) or disconnected. High when plug is connected upside-down (CC2 connected to CC in cable).
1 PlugEvent Output Output: Asserted high when plug event (attached state) has occurred, otherwise low.
0 NullEvent NA No event associated with this GPIO.