SLVUCA4 August   2021 TPS1653

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 REACH Compliance
    2. 1.2 EVM Features
    3. 1.3 Applications
  3. 2Description
  4. 3General Configurations
    1. 3.1 Physical Access
    2. 3.2 Test Equipment
      1. 3.2.1 Power Supplies
      2. 3.2.2 Meters
      3. 3.2.3 Oscilloscope
      4. 3.2.4 Loads
    3. 3.3 Test Setup
    4. 3.4 Test Procedure
      1. 3.4.1 Preliminary Tests
      2. 3.4.2 UVLO Tests
      3. 3.4.3 Current Limit Test with Step Load of 4 A to 7 A
      4. 3.4.4 Output Short-Circuit Protection Test
      5. 3.4.5 Start-Up With Short-Circuit On Output
  5. 4EVM Board Assembly Drawings and Layout
    1. 4.1 PCB Drawings
  6. 5Schematics
  7. 6Bill of Materials

UVLO Tests

Follow the instructions to verify undervoltage levels of the device:

  1. Set jumpers J3 and J9 in 2-3 position to set UVLO level at 43 V.
  2. Set the load resistance to 96 Ω ±1 Ω and the power supply voltage to 48 V. Enable the power supply and the load.
  3. Reduce the CH1 input voltage and verify that VOUT1 reduces as VN1 reduces and drops to zero when VIN1 falls below 43 V ±1 V (CH1 UVLO limit).
  4. Similarly, reduce the CH2 input voltage and verify that VOUT2 reduces as VN2 reduces and drops to zero when VIN2 falls below 43 V ±1 V (CH2 UVLO limit).
  5. Verify that CH1 and CH2 FLTb red LEDs (D3/D7) turn on whenever the supply voltage reaches UVLO limits of the respective channels.
  6. Disable the power supply and the load.