SLVUCI2 march   2023 AM68A , AM69 , AM69A , TDA4AH-Q1 , TDA4AL-Q1 , TDA4AP-Q1 , TDA4VE-Q1 , TDA4VH-Q1 , TDA4VL-Q1 , TDA4VP-Q1 , TPS6594-Q1

 

  1.   TPS6594133A-Q1 PMIC User Guide for Jacinto J784S4 or J721S2, PDN-3A, PDN-3B, PDN-3F
  2.   Trademarks
  3. 1Introduction
  4. 2Processor Connections
    1. 2.1 Power Mapping
    2. 2.2 Control Mapping
  5. 3Supporting Functional Safety Systems
    1. 3.1 Achieving ASIL-B System Requirements
    2. 3.2 Achieving up to ASIL-D System Requirements
  6. 4Static NVM Settings.
    1. 4.1  Application-Based Configuration Settings
    2. 4.2  Device Identification Settings
    3. 4.3  BUCK Settings
    4. 4.4  LDO Settings
    5. 4.5  VCCA Settings
    6. 4.6  GPIO Settings
    7. 4.7  Finite State Machine (FSM) Settings
    8. 4.8  Interrupt Settings
    9. 4.9  POWERGOOD Settings
    10. 4.10 Miscellaneous Settings
    11. 4.11 Interface Settings
    12. 4.12 Multi-Device Settings
    13. 4.13 Watchdog Settings
  7. 5Pre-Configurable Finite State Machine (PFSM) Settings
    1. 5.1 Configured States
    2. 5.2 PFSM Triggers
    3. 5.3 Power Sequences
      1. 5.3.1 TO_SAFE_SEVERE and TO_SAFE
      2. 5.3.2 TO_SAFE_ORDERLY and TO_STANDBY
      3. 5.3.3 ACTIVE_TO_WARM
      4. 5.3.4 ESM_SOC_ERROR
      5. 5.3.5 PWR_SOC_ERROR
      6. 5.3.6 MCU_TO_WARM
      7. 5.3.7 TO_MCU
      8. 5.3.8 TO_ACTIVE
      9. 5.3.9 TO_RETENTION
  8. 6Application Examples
    1. 6.1 Initialization
    2. 6.2 Moving Between States; ACTIVE, MCU ONLY and RETENTION
      1. 6.2.1 ACTIVE
      2. 6.2.2 MCU ONLY
      3. 6.2.3 RETENTION
    3. 6.3 Entering and Exiting Standby
    4. 6.4 Entering and Existing LP_STANDBY
  9. 7References

RETENTION

As shown in Section 5.3.9, the MCU is powered off and therefore the transition out of the RETENTION to the MCU ONLY or the ACTIVE states must be configured before entering RETENTION. Similar to the MCU ONLY state the I2C_7 triggers must be set for the PMIC. In this example GPIO4 on the TPS6594133A is used to wake the device from RETENTION to ACTIVE.

Write 0x48:0x34:0xC0:0x3F // Set GPIO4 to WKUP1 (goes to ACTIVE state) 
Write 0x48:0x64:0x08:0xF7 // clear interrupt of gpio4, write to clear 
Write 0x48:0x4F:0x00:0xF7 // unmask interrupt for GPIO4 falling edge 
Write 0x48:0x86:0x00:0xFC // trigger the TO_RETENTION power sequence 
After the GPIO4 has gone low and the PMIC has returned to the ACTIVE state 
Write 0x48:0x86:0x03:0xFC // Set NSLEEPx bits for ACTIVE state 
Write 0x48:0x64:0x08:0xF7 // clear interrupt of gpio4 

In this example the TPS6594133A RTC Timer is used to wake the device from RETENTION to ACTIVE.

Write 0x48:0xC3:0x01:0xFE // Enable Crystal 
Write 0x48:0xC5:0x05:0xF8 // minute timer, enable TIMER interrupts 
Write 0x48:0xC2:0x01:0xFE // start timer, if the timer values are non-zero clear before starting 
Write 0x48:0x86:0x00:0xFC // trigger the TO_RETENTION power sequence 
After the RTC Timer interrupt has occurred and the PMIC has returned to the ACTIVE state 
Write 0x48:0x86:0x03:0xFC // Set NSLEEPx bits for ACTIVE state 
Write 0x48:0xC5:0x00:0xFB // disable timer interrupt, clear bit 2 
Write 0x48:0xC4:0x00:0xDF // clear timer interrupt, clear bit 5.