The TO_MCU sequence first turns off rails and GPIOs which are assigned to the SOC power group. The sequence enables the MCU rails, in the event that they are not already active (when transitioning from STANDBY to MCU_ONLY for example). There are two cases for this sequence, based off the value stored in the I2C_7 bit found in register FSM_I2C_TRIGGERS. If the bit is low, then VDD_DDR_1V1 and EN_DDR_RET are disabled; Figure 5-10. If the I2C_7 bit is high, then VDD_DDR_1V1 and EN_DDR_RET are enabled; Figure 5-9.

The first instructions of the TO_MCU sequence perform writes to the MISC_CTRL and ENABLE_DRV_STAT registers.

// TPS6594133A
// Set AMUXOUT_EN, CLKMON_EN
// Clear LPM_EN, NRSTOUT_SOC 
REG_WRITE_MASK_IMM ADDR=0x81 DATA=0x18 MASK=0xE1
// Clear SPMI_LP_EN
REG_WRITE_MASK_IMM ADDR=0x82 DATA=0x00 MASK=0xEF

Figure 5-9 TO_MCU with I2C_7 High

Figure 5-10 TO_MCU Sequence with I2C_7 Low

Amongst the last instructions of the TO_MCU sequence, the PMIC writes to the MISC_CTRL and ENABLE_DRV_STAT registers after the delay defined in the PFSM_DELAY_REG_1.

// TPS6594133A
SREG_READ_REG ADDR=0xCD REG=R1
DELAY_SREG R1
// Clear FORCE_EN_DRV_LOW 
REG_WRITE_MASK_IMM ADDR=0x82 DATA=0x00 MASK=0xF7
// Set NRSTOUT (MCU_PORZ)
REG_WRITE_MASK_IMM ADDR=0x81 DATA=0x01 MASK=0xFE