SLVUCJ9 February   2023 LP8764-Q1 , TPS6594-Q1

 

  1.   PDN-0A User's Guide for Powering J7AEP with the TPS6594-Q1 and LP8764-Q1 PMICs
  2.   Trademarks
  3. 1Introduction
  4. 2Device Versions
  5. 3Processor Connections
    1. 3.1 Power Mapping
    2. 3.2 Control Mapping
  6. 4Supporting Functional Safety Systems
    1. 4.1 Achieving ASIL-B System Requirements
    2. 4.2 Achieving up to ASIL-D System Requirements
  7. 5Static NVM Settings
    1. 5.1  Application-Based Configuration Settings
    2. 5.2  Device Identification Settings
    3. 5.3  BUCK Settings
    4. 5.4  LDO Settings
    5. 5.5  VCCA Settings
    6. 5.6  GPIO Settings
    7. 5.7  Finite State Machine (FSM) Settings
    8. 5.8  Interrupt Settings
    9. 5.9  POWERGOOD Settings
    10. 5.10 Miscellaneous Settings
    11. 5.11 Interface Settings
    12. 5.12 Multi-Device Settings
    13. 5.13 Watchdog Settings
  8. 6Pre-Configurable Finite State Machine (PFSM) Settings
    1. 6.1 Configured States
    2. 6.2 PFSM Triggers
    3. 6.3 Power Sequences
      1. 6.3.1 TO_SAFE_SEVERE and TO_SAFE
      2. 6.3.2 TO_SAFE_ORDERLY and TO_STANDBY
      3. 6.3.3 ACTIVE_TO_WARM
      4. 6.3.4 ESM_SOC_ERROR
      5. 6.3.5 PWR_SOC_ERROR
      6. 6.3.6 MCU_TO_WARM
      7. 6.3.7 TO_MCU
      8. 6.3.8 TO_ACTIVE
      9. 6.3.9 TO_RETENTION
  9. 7Application Examples
    1. 7.1 Moving Between States; ACTIVE and RETENTION
      1. 7.1.1 ACTIVE
      2. 7.1.2 MCU ONLY
      3. 7.1.3 RETENTION
    2. 7.2 Entering and Exiting Standby
    3. 7.3 Entering and Exiting LP_STANDBY
    4. 7.4 Runtime Customization
  10. 8References

5.3 BUCK Settings

These settings detail the voltages, configurations, and monitoring of the BUCK rails stored in the NVM. All these settings can be changed though I2C after startup. Some settings, typically the enable bits, are also changed by the PFSM, as described in GUID-C4EB5B6E-C9E2-46E0-B5A5-085D4EE72490.html#GUID-C4EB5B6E-C9E2-46E0-B5A5-085D4EE72490.

After the GUID-9E18C445-7F77-47F6-9860-9BB40CA11E88.html sequence has completed, the BUCKx_EN bit is set for BUCK1 and BUCK5 in the TPS65941120-Q1. BUCKx_EN is set for the BUCK1, BUCK3, BUCK4 and BUCK5 in the TPS65941421-Q1. BUCKx_EN is set for the BUCK1 in the LP876411B5-Q1. The BUCKx_VMON_EN bit is set for BUCK1, BUCK3 and BUCK5 in the TPS65941120-Q1. The BUCKx_VMON_EN bit is set for BUCK1, BUCK3, BUCK4 and BUCK5 in the TPS65941421-Q1. The BUCKx_VMON_EN bit is set for BUCK1, BUCK3 and BUCK4 in the LP876411B5-Q1. The BUCKx_RV_SEL bit is cleared for all BUCKs. The other bits remain unchanged, but are still accessible via I2C.

Table 5-3 BUCK NVM Settings
Register Name Field Name TPS65941120-Q1 TPS65941421-Q1 LP876411B5-Q1
Value Description Value Description Value Description
BUCK1_CTRL BUCK1_EN 0x0 Disabled; BUCK1 regulator 0x0 Disabled; BUCK1 regulator 0x0 Disabled; BUCK1 regulator
BUCK1_FPWM 0x1 PWM operation only. 0x0 PFM and PWM operation (AUTO mode). 0x1 PWM operation only.
BUCK1_FPWM_MP 0x0 Automatic phase adding and shedding. 0x0 Automatic phase adding and shedding. 0x0 Automatic phase adding and shedding.
BUCK1_VMON_EN 0x0 Disabled; OV, UV, SC and ILIM comparators. 0x0 Disabled; OV, UV, SC and ILIM comparators. 0x0 Disabled; OV, UV, SC and ILIM comparators.
BUCK1_VSEL 0x0 BUCK1_VOUT_1 0x0 BUCK1_VOUT_1 0x0 BUCK1_VOUT_1
BUCK1_PLDN 0x1 Enabled; Pull-down resistor 0x1 Enabled; Pull-down resistor 0x1 Enabled; Pull-down resistor
BUCK1_RV_SEL 0x1 Enabled 0x1 Enabled 0x1 Enabled
BUCK1_CONF BUCK1_SLEW_RATE 0x3 5.0 mV/μs 0x3 5.0 mV/μs 0x3 5.0 mV/μs
BUCK1_ILIM 0x5 5.5 A 0x5 5.5 A 0x7 7.5 A
BUCK2_CTRL BUCK2_EN 0x0 Disabled; BUCK2 regulator 0x0 Disabled; BUCK2 regulator 0x0 Disabled; BUCK2 regulator
BUCK2_FPWM 0x1 PWM operation only. 0x0 PFM and PWM operation (AUTO mode). 0x1 PWM operation only.
BUCK2_VMON_EN 0x0 Disabled; OV, UV, SC and ILIM comparators. 0x0 Disabled; OV, UV, SC and ILIM comparators. 0x0 Disabled; OV, UV, SC and ILIM comparators.
BUCK2_VSEL 0x0 BUCK2_VOUT_1 0x0 BUCK2_VOUT_1 0x0 BUCK2_VOUT_1
BUCK2_PLDN 0x1 Enabled; Pull-down resistor 0x1 Enabled; Pull-down resistor 0x1 Enabled; Pull-down resistor
BUCK2_RV_SEL 0x1 Enabled 0x0 Disabled 0x1 Enabled
BUCK2_CONF BUCK2_SLEW_RATE 0x3 5.0 mV/μs 0x3 5.0 mV/μs 0x3 5.0 mV/μs
BUCK2_ILIM 0x5 5.5 A 0x5 5.5 A 0x7 7.5 A
BUCK3_CTRL BUCK3_EN 0x0 Disabled; BUCK3 regulator 0x0 Disabled; BUCK3 regulator 0x0 Disabled; BUCK3 regulator
BUCK3_FPWM 0x1 PWM operation only. 0x0 PFM and PWM operation (AUTO mode). 0x1 PWM operation only.
BUCK3_FPWM_MP 0x0 Automatic phase adding and shedding. 0x0 Automatic phase adding and shedding. 0x0 Automatic phase adding and shedding.
BUCK3_VMON_EN 0x0 Disabled; OV, UV, SC and ILIM comparators. 0x0 Disabled; OV, UV, SC and ILIM comparators. 0x0 Disabled; OV, UV, SC and ILIM comparators.
BUCK3_VSEL 0x0 BUCK3_VOUT_1 0x0 BUCK3_VOUT_1 0x0 BUCK3_VOUT_1
BUCK3_PLDN 0x1 Enabled; Pull-down resistor 0x1 Enabled; Pull-down resistor 0x1 Enabled; Pull-down resistor
BUCK3_RV_SEL 0x0 Disabled 0x1 Enabled 0x0 Disabled
BUCK3_CONF BUCK3_SLEW_RATE 0x5 1.3 mV/μs 0x3 5.0 mV/μs 0x2 10 mV/μs
BUCK3_ILIM 0x4 4.5 A 0x5 5.5 A 0x4 4.5 A
BUCK4_CTRL BUCK4_EN 0x0 Disabled; BUCK4 regulator 0x0 Disabled; BUCK4 regulator 0x0 Disabled; BUCK4 regulator
BUCK4_FPWM 0x1 PWM operation only. 0x0 PFM and PWM operation (AUTO mode). 0x1 PWM operation only.
BUCK4_VMON_EN 0x0 Disabled; OV, UV, SC and ILIM comparators. 0x0 Disabled; OV, UV, SC and ILIM comparators. 0x0 Disabled; OV, UV, SC and ILIM comparators.
BUCK4_VSEL 0x0 BUCK4_VOUT_1 0x0 BUCK4_VOUT_1 0x0 BUCK4_VOUT_1
BUCK4_PLDN 0x1 Enabled; Pull-down resistor 0x1 Enabled; Pull-down resistor 0x1 Enabled; Pull-down resistor
BUCK4_RV_SEL 0x0 Disabled 0x1 Enabled 0x0 Disabled
BUCK4_CONF BUCK4_SLEW_RATE 0x2 10 mV/μs 0x3 5.0 mV/μs 0x2 10 mV/μs
BUCK4_ILIM 0x4 4.5 A 0x5 5.5 A 0x4 4.5 A
BUCK5_CTRL BUCK5_EN 0x0 Disabled; BUCK5 regulator 0x0 Disabled; BUCK5 regulator
BUCK5_FPWM 0x1 PWM operation only. 0x0 PFM and PWM operation (AUTO mode).
BUCK5_VMON_EN 0x0 Disabled; OV, UV, SC and ILIM comparators. 0x0 Disabled; OV, UV, SC and ILIM comparators.
BUCK5_VSEL 0x0 BUCK5_VOUT_1 0x0 BUCK5_VOUT_1
BUCK5_PLDN 0x1 Enable Pull-down resistor 0x1 Enable Pull-down resistor
BUCK5_RV_SEL 0x1 Enabled 0x1 Enabled
BUCK5_CONF BUCK5_SLEW_RATE 0x3 5.0 mV/μs 0x3 5.0 mV/μs
BUCK5_ILIM 0x3 3.5 A 0x3 3.5 A
BUCK1_VOUT_1 BUCK1_VSET1 0x37 0.800 V 0xb2 1.80 V 0x37 0.800 V
BUCK1_VOUT_2 BUCK1_VSET2 0x37 0.800 V 0xb2 1.80 V 0x37 0.800 V
BUCK2_VOUT_1 BUCK2_VSET1 0x37 0.800 V 0x73 1.10 V 0x37 0.800 V
BUCK2_VOUT_2 BUCK2_VSET2 0x37 0.800 V 0x73 1.10 V 0x37 0.800 V
BUCK3_VOUT_1 BUCK3_VSET1 0xfd 3.30 V 0xb2 1.80 V 0x0 0.3 V
BUCK3_VOUT_2 BUCK3_VSET2 0xfd 3.30 V 0xb2 1.80 V 0x0 0.3 V
BUCK4_VOUT_1 BUCK4_VSET1 0x0 0.3 V 0x73 1.10 V 0x0 0.3 V
BUCK4_VOUT_2 BUCK4_VSET2 0x0 0.3 V 0x73 1.10 V 0x0 0.3 V
BUCK5_VOUT_1 BUCK5_VSET1 0x41 0.850 V 0x41 0.850 V
BUCK5_VOUT_2 BUCK5_VSET2 0x41 0.850 V 0x41 0.850 V
BUCK1_PG_WINDOW BUCK1_OV_THR 0x3 +5% / +50 mV 0x3 +5% / +50 mV 0x3 +5% / +50 mV
BUCK1_UV_THR 0x3 -5% / -50 mV 0x3 -5% / -50 mV 0x3 -5% / -50 mV
BUCK2_PG_WINDOW BUCK2_OV_THR 0x3 +5% / +50 mV 0x7 +10% / +100mV 0x3 +5% / +50 mV
BUCK2_UV_THR 0x3 -5% / -50 mV 0x7 -10% / -100mV 0x3 -5% / -50 mV
BUCK3_PG_WINDOW BUCK3_OV_THR 0x7 +10% / +100mV 0x3 +5% / +50 mV 0x0 +3% / +30mV
BUCK3_UV_THR 0x7 -10% / -100mV 0x3 -5% / -50 mV 0x0 -3% / -30mV
BUCK4_PG_WINDOW BUCK4_OV_THR 0x0 +3% / +30mV 0x3 +5% / +50 mV 0x0 +3% / +30mV
BUCK4_UV_THR 0x0 -3% / -30mV 0x3 -5% / -50 mV 0x0 -3% / -30mV
BUCK5_PG_WINDOW BUCK5_OV_THR 0x3 +5% / +50 mV 0x3 +5% / +50 mV
BUCK5_UV_THR 0x3 -5% / -50 mV 0x3 -5% / -50 mV