SLVUD74A April   2025  – June 2025 LM72880-Q1

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Test Setup and Procedure
      1. 2.1.1 EVM Connections
      2. 2.1.2 Test Equipment
      3. 2.1.3 Recommended Test Setup
        1. 2.1.3.1 Input Connections
        2. 2.1.3.2 Output Connections
        3. 2.1.3.3 I2C Connections
      4. 2.1.4 Test Procedure
        1. 2.1.4.1 Graphic User Interface (GUI)
          1. 2.1.4.1.1 Quick Overview
        2. 2.1.4.2 Basic Test Procedure
  9. 3Implementation Results
    1. 3.1 Test Data and Performance Curves
      1. 3.1.1 Efficiency
      2. 3.1.2 Operating Waveforms
        1. 3.1.2.1 Start-Up and Shutdown
        2. 3.1.2.2 Switching
        3. 3.1.2.3 Load Transient (CV), ISET Modulation (CC)
      3. 3.1.3 Thermal Performance
      4. 3.1.4 EMI Performance
  10. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials
  11. 5Additional Information
    1. 5.1 Trademarks
  12. 6Device and Documentation Support
    1. 6.1 Device Support
      1. 6.1.1 Development Support
    2. 6.2 Documentation Support
      1. 6.2.1 Related Documentation
        1. 6.2.1.1 PCB Layout Resources
        2. 6.2.1.2 Thermal Design Resources
  13. 7Revision History

EVM Connections

The recommended test setup is shown in Figure 2-1. Working at an ESD-protected workstation, make sure that any wrist straps, boot straps, or mats are connected and referencing the user to earth ground before handling the EVM.

LM72880QEVM-400 EVM Test
                    Setup Figure 2-1 EVM Test Setup
CAUTION:
LM72880QEVM-400
Hot surface. Contact can cause burns. Do not touch.
Table 2-1 Power Connections
REF DES LABEL DESCRIPTION
J4 VIN+ Positive input voltage power connection
J4 VIN– Negative input voltage power connection
J1 VIN_EMI+ Positive input voltage power connection for EMI test
J1 VIN_EMI– Negative input voltage power connection for EMI test
J3 VOUT+ Positive output voltage power connection
J3 VOUT– Negative output voltage power connection
Table 2-2 DVM Connections
REF DES LABEL DESCRIPTION
TP5 VIN+ Positive input voltage sensing
TP6 VIN– Negative input voltage sensing
TP3 VOUT+ Positive output voltage sensing
TP4 VOUT- Negative output voltage sensing
Table 2-3 J5 Jumper
NUMBER LABEL DESCRIPTION
1 VDDA VDDA connection
2 PFM PFM / FPWM mode selection and synchronization input pin
3 GND Ground connection
4 EN Enable input. Connect the pin to GND to disable the device.
5 GND Ground connection
6 COMP External compensation pin
7 VOUT VOUT connection pin
8 nINT Interrupt indicator pin. An open-drain output is connected to VDDA through 100kΩ pullup resistor.
9 VCC VCC connection
10 IMON IMON connection. Current monitor pin. Leave the pin floating during start-up.
11 GND Ground connection
Table 2-4 J6 Jumper
NUMBER LABEL DESCRIPTION
1, 2, 3, 4, 7, 8 NC No connect pin
5 EXT-3.3V Connected to the external 3.3V from USB2ANY
6 GND Ground connection
9 SCL I2C clock pin
10 SDA I2C data pin