SNAK009A April   2022  – February 2024 ADC128S102-SEP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Overview
  5. 2SEE Mechanisms
  6. 3Test Device and Test Board Information
  7. 4Irradiation Facility and Setup
  8. 5Single-Event Latch-Up Results
  9. 6Summary
  10. 7Confidence Interval Calculations
  11. 8References
  12. 9Revision History

3 Test Device and Test Board Information

The ADC128S102-SEP is packaged in a 16-pin, TSSOP shown with the pinout in Figure 3-1. Figure 3-2 shows the biasing configuration used for both the SEL and SET tests.

ADC128S102-SEP pinout diagram. The package was decapped to reveal the die face for all heavy ion testing.

GUID-B7241702-0743-44EE-94CA-5F0C01F43A2F-low.pngFigure 3-1 ADC128S102-SEP Pinout Diagram
GUID-B3B88FB3-5B9E-4BDD-8677-A91D9B2E5334-low.jpgFigure 3-2 ADC128S102-SEP Bias Configuration