SNAS849A December   2024  – July 2026 LMX2624-SP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Reference Oscillator Input
      2. 6.3.2  Reference Path
        1. 6.3.2.1 OSCin Doubler (OSC_2X)
        2. 6.3.2.2 Pre-R Divider (PLL_R_PRE)
        3. 6.3.2.3 Post-R Divider (PLL_R)
      3. 6.3.3  State Machine Clock
      4. 6.3.4  PLL Phase Detector and Charge Pump
      5. 6.3.5  N Divider and Fractional Circuitry
      6. 6.3.6  MUXout Pin
        1. 6.3.6.1 Serial Data Output for Readback
        2. 6.3.6.2 Lock Detect Indicator Set as Type “VCOcal” or "Vtune and VCOcal"
      7. 6.3.7  VCO (Voltage-Controlled Oscillator)
        1. 6.3.7.1 VCO Calibration
        2. 6.3.7.2 Determining the VCO Gain
        3. 6.3.7.3 Double Buffering (Shadow Registers)
        4. 6.3.7.4 Watchdog Feature
        5. 6.3.7.5 RECAL Feature
      8. 6.3.8  Channel Divider
      9. 6.3.9  Output Mute Pin and Ping Pong Approaches
      10. 6.3.10 Output Frequency Doubler
      11. 6.3.11 Output Buffer
      12. 6.3.12 Power-Down Modes
      13. 6.3.13 Phase Synchronization
        1. 6.3.13.1 General Concept
        2. 6.3.13.2 Categories of Applications for SYNC
        3. 6.3.13.3 Procedure for Using SYNC
      14. 6.3.14 SYSREF
        1. 6.3.14.1 Programmable Fields
        2. 6.3.14.2 Examples
        3. 6.3.14.3 SYSREF Procedure
      15. 6.3.15 Pin-Mode Integer Frequency Generation
        1. 6.3.15.1 4-level Pins Using GPIOs
        2. 6.3.15.2 Pin-Mode Example
      16. 6.3.16 Device Functional Modes
    4. 6.4 Treatment of Unused Pins
    5. 6.5 Programming
      1. 6.5.1 Recommended Initial Power-Up Sequence
      2. 6.5.2 Recommended Sequence for Changing Frequencies
      3. 6.5.3 Register Maps
        1. 6.5.3.1 Device Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 OSCin Configuration
      2. 7.1.2 OSCin Slew Rate
      3. 7.1.3 RF Output Buffer Power Control
      4. 7.1.4 RF Output Buffer
      5. 7.1.5 RF Output Treatment for the Complimentary Side
        1. 7.1.5.1 Single-ended Termination of Unused Output
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Footprint Example on PCB Layout
      4. 7.4.4 Radiation Environments
        1. 7.4.4.1 Total Ionizing Dose
        2. 7.4.4.2 Single Event Effect
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Engineering Samples
    2. 10.2 Package Option Addendum
    3. 10.3 Tape and Reel Information

5.8 Typical Characteristics

Unless stated otherwise, the following conditions can be assumed: Temperature = 25°C, Vcc = 3.3V, OUTx_PWR=7, OSCIN_P driven single ended with 10dBm at pin.

LMX2624-SP Closed-Loop Phase Noise at Channel Divider Frequency Range
fOSC = 100MHz, fPD = 200MHz, Channel Divider Value: 2
Figure 5-4 Closed-Loop Phase Noise at Channel Divider Frequency Range
LMX2624-SP Closed-Loop Phase Noise at Doubler Frequency Range
fOSC = 100MHz, fPD = 200MHz
Figure 5-6 Closed-Loop Phase Noise at Doubler Frequency Range
LMX2624-SP Closed-Loop Phase Noise at 7.5GHz
fOSC = 100MHz, fPD = 200MHz, Channel Divider Value: 2
Figure 5-8 Closed-Loop Phase Noise at 7.5GHz
LMX2624-SP Closed-Loop Phase Noise at 15GHz
fOSC = 100MHz, fPD = 200MHz
Figure 5-10 Closed-Loop Phase Noise at 15GHz
LMX2624-SP Closed-Loop Phase Noise at 30GHz (Doubler Range)
fOSC = 100MHz, fPD = 200MHz

fVCO = 15GHz; fOUT = 15GHz×2 = 30GHz
Figure 5-12 Closed-Loop Phase Noise at 30GHz (Doubler Range)
LMX2624-SP PLL Noise Metric Variation vs. OSCin Slew Rate
Figure 5-14 PLL Noise Metric Variation vs. OSCin Slew Rate
LMX2624-SP Output Power vs. Temperature in VCO Frequency Range
Figure 5-16 Output Power vs. Temperature in VCO Frequency Range
LMX2624-SP Output Power vs OUTx_PWR
Figure 5-18 Output Power vs OUTx_PWR
LMX2624-SP Channel to Channel Skew
Figure 5-20 Channel to Channel Skew
LMX2624-SP Second Harmonics in VCO Frequency Range
Single-Ended Output
Figure 5-22 Second Harmonics in VCO Frequency Range
LMX2624-SP Third Harmonics in VCO Frequency Range
Single-Ended Output
Figure 5-24 Third Harmonics in VCO Frequency Range
LMX2624-SP Sub-Harmonics in Doubler Frequency Range
Single-Ended Output
Figure 5-26 Sub-Harmonics in Doubler Frequency Range
LMX2624-SP 3/2 Harmonics in Doubler Frequency Range
Single-Ended Output
Figure 5-28 3/2 Harmonics in Doubler Frequency Range
LMX2624-SP Mute Pin Output Enable Time
SM Clock = 50MHz
Figure 5-30 Mute Pin Output Enable Time
LMX2624-SP Phase Noise Plot (2GHz)
Single-Ended Output; fOSC = 100MHz, fPD = 200MHz, Loop Filter BW = 400kHz
Figure 5-32 Phase Noise Plot (2GHz)
LMX2624-SP Phase Noise Plot (16GHz)
Single-Ended Output; fOSC = 100MHz, fPD = 200MHz, Loop Filter BW = 400kHz
Figure 5-34 Phase Noise Plot (16GHz)
LMX2624-SP Differential Output waveform in time domain (8GHz)
C1 : RFOUTAP; C3 : RFOUTAM; M1 : RFOUTAP - RFOUTAM (Differential)
Figure 5-36 Differential Output waveform in time domain (8GHz)
LMX2624-SP Current Consumption vs Output Frequency
Single channel enabled
Figure 5-38 Current Consumption vs Output Frequency
LMX2624-SP Closed-Loop Phase Noise at VCO Frequency Range
fOSC = 100MHz, fPD = 200MHz
Figure 5-5 Closed-Loop Phase Noise at VCO Frequency Range
LMX2624-SP Closed-Loop Phase Noise at 3.8GHz
fOSC = 100MHz, fPD = 200MHz, Channel Divider Value: 2
Figure 5-7 Closed-Loop Phase Noise at 3.8GHz
LMX2624-SP Closed-Loop Phase Noise at 7.6GHz
fOSC = 100MHz, fPD = 200MHz
Figure 5-9 Closed-Loop Phase Noise at 7.6GHz
LMX2624-SP Closed-Loop Phase Noise at 15.2GHz (Doubler Range)
fOSC = 100MHz, fPD = 200MHz

fVCO = 7.6GHz; fOUT = 7.6GHz×2 = 15.2GHz
Figure 5-11 Closed-Loop Phase Noise at 15.2GHz (Doubler Range)
LMX2624-SP Open-Loop VCO Phase Noise
Figure 5-13 Open-Loop VCO Phase Noise
LMX2624-SP Output Power vs. Temperature in Channel Divider Frequency Range
Power dip at divider value 6
Figure 5-15 Output Power vs. Temperature in Channel Divider Frequency Range
LMX2624-SP Output Power vs. Temperature in Doubler Frequency Range
Figure 5-17 Output Power vs. Temperature in Doubler Frequency Range
LMX2624-SP Each RFout Pin Output Power
Figure 5-19 Each RFout Pin Output Power
LMX2624-SP Second Harmonics in VCO Frequency Range
Differential Output
Figure 5-21 Second Harmonics in VCO Frequency Range
LMX2624-SP Third Harmonics in VCO Frequency Range
Differential Output
Figure 5-23 Third Harmonics in VCO Frequency Range
LMX2624-SP Sub-Harmonics in Doubler Frequency Range
Differential Output
Figure 5-25 Sub-Harmonics in Doubler Frequency Range
LMX2624-SP 3/2 Harmonics in Doubler Frequency Range
Differential Output
Figure 5-27 3/2 Harmonics in Doubler Frequency Range
LMX2624-SP Integrated Jitter (Jitter (fs) Vs Output Frequency (MHz)
Integration Range is 1k-100MHz
Figure 5-29 Integrated Jitter (Jitter (fs) Vs Output Frequency (MHz)
LMX2624-SP Mute Pin Output Disable Time
SM Clock = 50MHz
Figure 5-31 Mute Pin Output Disable Time
LMX2624-SP Phase Noise Plot (8GHz)
Single-Ended Output; fOSC = 100MHz, fPD = 200MHz, Loop Filter BW = 400kHz
Figure 5-33 Phase Noise Plot (8GHz)
LMX2624-SP Differential Output waveform in time domain (2GHz)
C1 : RFOUTAP; C3 : RFOUTAM; M1 : RFOUTAP - RFOUTAM (Differential)
Figure 5-35 Differential Output waveform in time domain (2GHz)
LMX2624-SP Differential Output waveform in time domain (16GHz)
C1 : RFOUTAP; C3 : RFOUTAM; M1 : RFOUTAP - RFOUTAM (Differential)
Figure 5-37 Differential Output waveform in time domain (16GHz)