SNAS875B February   2025  – January 2026 LMR60430-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable and Undervoltage Lockout (UVLO)
      2. 7.3.2 Soft Start and Recovery from Dropout
      3. 7.3.3 Frequency Selection With RT
      4. 7.3.4 MODE/SYNC Pin Control
      5. 7.3.5 Output Voltage Selection
      6. 7.3.6 Current Limit
      7. 7.3.7 Hiccup Mode
      8. 7.3.8 Power-Good Function
      9. 7.3.9 Spread Spectrum
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown
      2. 7.4.2 Active Mode
        1. 7.4.2.1 Continuous Conduction Mode (CCM)
        2. 7.4.2.2 Auto Mode - Light Load Operation
        3. 7.4.2.3 FPWM Operation - Light Load Operation
        4. 7.4.2.4 Minimum On-Time
        5. 7.4.2.5 Dropout
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Switching Frequency Selection
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 Bootstrap Capacitor (CBOOT) Selection
        6. 8.2.2.6 FB Voltage Divider for Adjustable Output Voltages
          1. 8.2.2.6.1 Feedforward Capacitor (CFF) Selection
        7. 8.2.2.7 RPG - PG Pullup Resistor
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Ground and Thermal Plane Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.3.6 Current Limit

The LMR60430-Q1 uses two current limits to limit the total load current delivered to the output. These limits are known as the high side peak current limit (IHS-LIM) and the low side valley current limit (ILS-LIM). After IHS-LIM is reached on the inductor current, the high side MOSFET is turned off and the low side MOSFET is turned ON until the inductor current falls below ILS-LIM. This action can result in a reduction in switching frequency and can be referred to as soft current limit. Because the inductor current is limited to switch between IHS-LIM and ILS-LIM, the maximum output current is very close to the average between these two values. If the load demands a current that is greater than the maximum output current, the output voltage decreases. If the output voltage decreases such that the voltage on the FB pin drops below VHIC, then the device enters into hiccup mode. See also Section 7.3.7.

The high side current limit in LMR60430-Q1 varies as the duty cycle varies. This behaviour is characteristic of peak current mode control and helps avoid subharmonic oscillation at higher duty cycles. The typical high side current limit is shown in Figure 7-5.

The LMR60430-Q1 also implements a negative current limit (ILS-NEG-LIM) to limit the amount of current the low-side MOSFET can sink. After the negative current limit is reached, the low-side MOSFET turns off.

LMR60430-Q1 Typical high side current limit IHS-LIM as a function of duty cycle D Figure 7-5 Typical high side current limit IHS-LIM as a function of duty cycle D