SNAU318 June   2025 LMX1205

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Additional Images
    2. 2.2 Jumper Information
    3. 2.3 Multiplier Lock Detect Jumper
    4. 2.4 Setup
      1. 2.4.1 Evaluation Setup Requirement
      2. 2.4.2 Connection Diagram
    5. 2.5 Power Requirements
    6. 2.6 Reference Clock
    7. 2.7 Output Connections
    8. 2.8 Test Points
  7. 3Software
    1. 3.1 Software Description
    2. 3.2 Software Installation
    3. 3.3 USB2ANY Interface
  8. 4Implementation Results
    1. 4.1 Buffer Mode
    2. 4.2 Multiplier and Divider Modes
    3. 4.3 Logic Clock
    4. 4.4 Programmable Delay
  9. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  10. 6Additional Information
    1. 6.1 Trademarks

2.6 Reference Clock

Connect the CLKINP SMA connector to a high-quality signal source, such as a SMA100B signal generator. Set the output power of the signal generator to 10dBm. Both CLKIN inputs terminate internally with 50Ω to AC-GND which is formed by an internal capacitor, so no external termination is required. To drive input differentially, connect both CLKINP and CLKINN SMA connectors to a balun or differential clock source.

The default EVM profile configures the device in buffer mode. The input frequency is modifiable per the operating range of each functional element. This EVM setup guide and related plots assume 3200MHz input at CLKIN for buffer mode.

To evaluate SYSREF repeater and re-timer mode, connect the SYSREF input SMAs to a differential output source, such as an arbitrary function generator. The primary LMX1205 device drives the primary device or the secondary device SYSREF input. The primary LMX1205 device SYSREF is configured in SPI mode or Generation mode.

If the primary devices SYSREF input is driven using an arbitrary function generator, the EVM connections for the SYSREF input are DC-coupled and provide internal 100Ω termination. In DC-coupled mode, the common mode bias on the SYSREFREQ pins must be between 1V and 2V. A standard LVDS output buffer fulfills the input common mode requirements.

Configure the SYSREF output of the primary device and the SYSREF request input of the secondary device so that the interface termination is compatible. The SYSREF interface termination is differential ended, single ended, and AC/DC coupled. The common mode of the generated output SYSREF is set by the primary device.

Evaluate SYNC mode and SYSREF windowing in the secondary device. The primary device is configured either in SYNC or SYSREF Generation Mode and is fed to the secondary devices where the user can perform windowing and clock synchronization.