SNAU318 June   2025 LMX1205

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Additional Images
    2. 2.2 Jumper Information
    3. 2.3 Multiplier Lock Detect Jumper
    4. 2.4 Setup
      1. 2.4.1 Evaluation Setup Requirement
      2. 2.4.2 Connection Diagram
    5. 2.5 Power Requirements
    6. 2.6 Reference Clock
    7. 2.7 Output Connections
    8. 2.8 Test Points
  7. 3Software
    1. 3.1 Software Description
    2. 3.2 Software Installation
    3. 3.3 USB2ANY Interface
  8. 4Implementation Results
    1. 4.1 Buffer Mode
    2. 4.2 Multiplier and Divider Modes
    3. 4.3 Logic Clock
    4. 4.4 Programmable Delay
  9. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  10. 6Additional Information
    1. 6.1 Trademarks

4.4 Programmable Delay

The input and output path clock have individually programmable delays. The clock signal delay is up to 60ps, with 1.1ps resolution per code from the input path and 55ps with 0.9ps resolution per code at the output path. To highlight the feature, skew an output clock (CLKOUT1) channel trace by approximately 10ps in secondary1 device with respect to CLKOUT2 of the same device. CLKOUT2 of secondary 2 device is skewed by approximately 5ps with respect to CLKOUT1 of the same device. The secondary 2 device skew allows the user to validate the programmable delay feature offered by the device.

LMX1205MSEVM Clock Out Path with Trace Length Skewed Figure 4-10 Clock Out Path with Trace Length Skewed

Figure 4-11 shows the waveform plot of the secondary1 device. Figure 4-11 shows a 10.8ps skew from other channels.

LMX1205MSEVM Channel to Channel Skew of Clock Path with Trace length mismatch Figure 4-11 Channel to Channel Skew of Clock Path with Trace length mismatch

To skew the waveform:

  1. Select the device.
  2. Select the MultisiteBoard page.
  3. Select the Select Device drop-down menu.
  4. Select the device.
    LMX1205MSEVM Software Configuration for Device Selection Figure 4-12 Software Configuration for Device Selection
  5. Navigate to device selected.
  6. Identify the trace that is skewed on the board, adjust the delay of the skewed trace channel.
LMX1205MSEVM Software Configuration for changing Clock Path Output Delay Figure 4-13 Software Configuration for changing Clock Path Output Delay

Figure 4-14 shows the waveform after adjusting the output delay so that the channel-to-channel skew is < 1ps.

LMX1205MSEVM Channel to Channel Skew After Adjusting the Output Delay of the Clock Path Figure 4-14 Channel to Channel Skew After Adjusting the Output Delay of the Clock Path

The programmable delay feature of the device has wide range of applications. One application of the delay features is to calibrate and adjust the output delays of clock path to align all clock output edges in a large phased array cascaded clock tree. Another application is to offset a mismatch in:

  • Trace lengths
  • PCB interconnects
  • Cables
  • Channel to Channel skew

The delay features also uses windowing to align the SYSREF edges to the clock falling edge.