SNLA370A December   2020  – December 2020 DP83TG720R-Q1 , DP83TG720S-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Device Comparison
    1. 2.1 Feature Comparison
    2. 2.2 Pin Map Comparison
    3. 2.3 Strap Comparison
      1. 2.3.1 PHY Address Straps
      2. 2.3.2 MAC Interface, Master/Slave, Autonomous Strap
    4. 2.4 Power-Supply Comparison
    5. 2.5 MDI Comparison
  4. 3Reference Schematics
  5. 4Summary
  6. 5Revision History

Power-Supply Comparison

DP83TC811 has two power supply rails, VDDA and VDDIO. VDDA support 3.3 V operation while VDDIO supports 1.8 V, 2.5 V, and 3.3 V. Each pin is recommended to have 4 decoupling capacitors (10μF, 1μF, 0.1μF, 100nF) with optional series ferrite beads. Additionally EN pin can be connected to VDDIO. Refer to DP83TC811's data sheet's Power Supply Recommendation section.

DP83TG720 has four supply rails VDDA, VDDIO, VDDA1P0, VSLEEP. VSLEEP should be stable even when the PHY is in the sleep mode. Supply pins 22,21,9 and 11 are recommended to have 3 decoupling capacitors (2.2μF, 0.1μF, 100nF) close to the pins. For supply pin 34, 2 decoupling capacitors (0.1uF and 100nF) should be sufficient. VSLEEP (for sleep mode application) should come from a 3.3 V LDO which is active during sleep mode also. For applications not using sleep mode, pin 7 can be connected to pin 11. VDDA, VDDIO, VDD1P0 also need series ferrite bead. Refer to DP83TG720's data sheet's Power Supply Recommendation section for full component and connection details.

Note:
  • TP784105-Q1 (TPS784105QWDRBRQ1) has been optimized at 1.05V to be DP83TG720's dedicated companion LDO for vdd1p0 supply. Tuning of the LDO to 1.05V takes care of the votlage drop due to ferrite bead's DC impedance and switching current of PHY, insuring that DP83TG720 gets required voltage level at the pin .
  • TPS7B81-Q1 is the recommended LDO for DP83TG720's VSleep. Ultra-low quiescent current of TPS7B81-Q1 makes it the right choice for sleep mode application.