SNLA492 September   2025 TDP2004-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Access Methods
    1. 2.1 Pin-Strap Mode
    2. 2.2 SMBus, I2C Primary Mode
    3. 2.3 SMBus, I2C Secondary Mode
  6. 3Register Mapping
    1. 3.1 Shared Registers
    2. 3.2 Channel Registers
  7. 4RX Equalization Control Settings
  8. 5Flat-Gain
  9. 6RX Equalization and Flat Gain Selection Matrix
  10. 7TDP2004-Q1 Programming Example
    1. 7.1 PD Control Through Register Programming
    2. 7.2 Broadcast Channel CTLE Index or Flat Gain Selection Through Register Programming (CTLE Index 2, Flat Gain 0dB)
    3. 7.3 Individual Channel CTLE Index or Flat Gain Selection Through Register Programming (CTLE Index 2, Flat Gain 0dB)
  11. 8Summary
  12. 9References

5 Flat-Gain

The GAIN pin can be used to set the overall data-path flat gain (DC and AC) of the TDP2004when the device is in Pin mode. The pin GAIN sets the flat-gain for channels 0-3. In I2C mode each channel can be independently set. Table 6-2 provides flat gain control configuration settings. For most systems the default setting of GAIN = L4 (float) is recommended that provides flat gain of 0dB.

The flat-gain and equalization of the TDP2004-Q1 must be set such that the output signal swing at DC and high frequency does not exceed the DC and AC linearity ranges of the devices, respectively.

Table 5-1 Flat Gain Configuration Settings
Pin mode GAINI2C Modeflat_gain_2:0Flat Gain
L00–5.6dB
L11–3.8dB
L23–1.2dB
L4 (float)50.6dB (default recommendation)
L37+2.6dB