SNOA949 May   2016 LDC1312 , LDC1312-Q1 , LDC1314 , LDC1314-Q1 , LDC1612 , LDC1612-Q1 , LDC1614 , LDC1614-Q1

 

  1.   Power Reduction Techniques for the Multichannel LDCs in Inductive Sensing Applications
    1.     Trademarks
    2. 1 Introduction
    3. 2 Duty Cycling
      1. 2.1 Operational Parameters That Affect Duty Cycling
    4. 3 Clock Gating
    5. 4 Test Setup
    6. 5 Measurement Results
      1. 5.1 Measurements with Internal Clock
      2. 5.2 Current Consumption Measurements vs Data Conversion Time
        1. 5.2.1 Data Readback Overhead
        2. 5.2.2 Comparison of Measured and Estimated Current Consumption
          1. 5.2.2.1 Estimating Current Consumption
        3. 5.2.3 Results
    7. 6 Summary

2 Duty Cycling

For low power applications, duty-cycling the LDC is a technique that can be used to reduce the power consumption. When the LDC can sample much faster than the application requires, the device can be put into a lower power mode while it is not in the data conversion process. The device is only active when it is performing a measurement conversion to minimize the total amount of current flowing through the device and therefore reduce overall power consumption. The LDC devices have two low power modes that can be used for duty-cycling. The first one is sleep mode where the LDC retains its registers contents except for those in the data registers. The second one is shutdown mode where the LDC loses all its register contents and the shutdown (SD) pin on the chip itself needs to be toggled. For consistency, the rest of this document will refer to sleep mode as the low power mode when discussing duty-cycling.

One of the main tradeoffs associated with this duty-cycling technique is responsiveness. The higher the sampling rate, the more responsive the system is, but at the cost of higher average power. Many applications do not need a fast response time and can benefit from the lower power consumption that comes with a lower sampling rate. For example, a human-machine interface (HMI) may only need a sampling rate of 20 SPS or lower, which is much lower than the peak 13 kSPS of the multichannel LDC devices. The total conversion time of a measurement for a given sampling rate can also affect power consumption depending on the resolution requirements. This concept corresponds to the duty cycle of the device at a particular sampling rate.