SNVA961A May   2020  – November 2024 LM26420-Q1

 

  1.   1
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 HTSSOP-20 Package
    2. 2.2 WQFN-16 Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 HTSSOP-20 Package
    2. 4.2 WQFN-16 Package
  6. 5Revision History

3 Failure Mode Distribution (FMD)

The failure mode distribution estimation for LM26420-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity, and from best engineering judgment.

The failure modes listed in this section reflect random failure events and do not include failures resulting from misuse or overstress.

Table 3-1 Die Failure Modes and Distribution
Die Failure ModesFailure Mode Distribution (%)
SW1 and SW2 no output45
SW1 and SW2 output not in specification – voltage or timing40
SW1 and SW2 power FET stuck on5
PG1 and PG2 false trip, fails to trip5
Short circuit any two pins5