SNVA961A May   2020  – November 2024 LM26420-Q1

 

  1.   1
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 HTSSOP-20 Package
    2. 2.2 WQFN-16 Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 HTSSOP-20 Package
    2. 4.2 WQFN-16 Package
  6. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the LM26420-Q1 (HTSSOP-20 and WQFN-16 package). The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 through Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality.
BNo device damage, but loss of functionality.
CNo device damage, but performance degradation.
DNo device damage, no impact to functionality or performance.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • Assumes the device is running in the typical application. Refer to the Typical Application Circuit section in the LM26420-Q1 data sheet.