SNVA994A February   2022  – March 2023 LM5157 , LM5157-Q1 , LM51571-Q1 , LM5158 , LM5158-Q1 , LM51581 , LM51581-Q1

 

  1.   1
  2.   Trademarks
  3. 1Introduction
  4. 2Example Application
  5. 3Calculations and Component Selection
    1. 3.1 Switching Frequency
    2. 3.2 Transformer Selection
      1. 3.2.1 Maximum Duty Cycle and Turns Ratio Selection
      2. 3.2.2 Primary Winding Inductance Selection
    3. 3.3 Slope Compensation Check
    4. 3.4 Diode Selection
    5. 3.5 Output Capacitor Selection
    6. 3.6 Input Capacitor Selection
    7. 3.7 UVLO Resistor Selection
    8. 3.8 Control Loop Compensation
      1. 3.8.1 Crossover Frequency (fcross) Selection
      2. 3.8.2 RCOMP Selection
      3. 3.8.3 CCOMP Selection
      4. 3.8.4 CHF Selection
  6. 4Component Selection Summary
    1. 4.1 Application Circuit
    2. 4.2 Bill of Materials
  7. 5Small Signal Frequency Analysis
    1. 5.1 Flyback Regulator Modulator Modeling
    2. 5.2 Compensation Modeling
  8. 6Revision History

3.8.1 Crossover Frequency (fcross) Selection

The crossover frequency of the loop can be either selected to be 1/10 the switching frequency or 1/5 the right-half plane zero frequency, which ever is lower. Equation 20 shows the calculation for 1/10 the switching frequency. Equation 21 and Equation 22 show how to calculate the 1/5 the right half plane zero frequency at full load and half load conditions.

Equation 20. fcross=fsw10=250kHz10=25kHz
Equation 21. fCROSS_1= fZ_RHP 5=15 ×Np2Ns12 × VLOAD12POUT_totalD'22×π×LM×D= 15 ×121.22 × 10V28.5W1-0.5122×π×8µH×0.51=15.3kHz
Equation 22. fCROSS_2= fZ_RHP 5=15 ×Np2Ns12 × VLOAD12POUT_totalD'22×π×LM×D= 15 ×121.22 × 10V24.25W1-0.5122×π×8µH×0.51=7.65kHz

where

  • D' is (1 -D) a the minimum supply voltage
  • POUT_total is the summed up total output power of all outputs

To give some margin, the crossover frequency is selected to be 9 kHz, a little less than 1/5 the right half plane zero frequency at half load condition. In this design example, the performance under the full load condition is more important and needs to be optimized. Therefore, the full load condition with the input voltage from 8 V to 16 V is used for the calculations below. After the design and selection of the compensation loop, the stability of the half load condition can be checked with the equations in Section 5.