SNVSCM7A December   2023  – May 2026 LMR38015-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency Peak Current Mode Control
      2. 7.3.2  Adjustable Output Voltage
      3. 7.3.3  Enable
      4. 7.3.4  Switching Frequency and Synchronization (RT/SYNC)
      5. 7.3.5  Power-Good Flag Output
      6. 7.3.6  Minimum On Time, Minimum Off Time, and Frequency Foldback
      7. 7.3.7  Bootstrap Voltage
      8. 7.3.8  Overcurrent and Short-Circuit Protection
      9. 7.3.9  Soft Start
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Auto Mode
      2. 7.4.2 Forced PWM Operation
      3. 7.4.3 Dropout
      4. 7.4.4 Minimum Switch On Time
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Choosing the Switching Frequency
        3. 8.2.2.3 FB for Adjustable Output
        4. 8.2.2.4 Inductor Selection
        5. 8.2.2.5 Output Capacitor Selection
        6. 8.2.2.6 Input Capacitor Selection
        7. 8.2.2.7 CBOOT
        8. 8.2.2.8 External UVLO
        9. 8.2.2.9 Maximum Ambient Temperature
      3. 8.2.3 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

LMR38015-Q1 DRR Package, 12-Pin WSON (Top View) Figure 5-1 DRR Package, 12-Pin WSON (Top View)
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
GND 1, 2 G Power and analog ground terminal. All electrical parameters are measured with respect to this pin. Connect a high-quality bypass capacitor directly to this pin and VIN with short and wide traces.
EN 3 A Enable input to regulator. High = ON, low = OFF. Can be connected directly to VIN. Do not float.
NC 4 No Connect. Floating pin.
VIN 5, 6 P Input supply to the regulator. Connect a high-quality bypass capacitor or capacitors directly to this pin and GND with short and wide traces.
RT/SYNC 7 A Resistor timing or external clock input. An internal amplifier holds this pin at a fixed voltage when using an external resistor to ground to set the switching frequency. If the pin is pulled above the PLL upper threshold, a mode change occurs and the pin becomes a synchronization input. The internal amplifier is disabled and the pin is now a high impedance clock input to the internal PLL. If clocking edges stop, the internal amplifier is re-enabled and the operating mode returns to frequency programming by resistor.
FB 8 A Feedback input. For the adjustable output version, connect the mid-point of the feedback resistor divider to this pin. Connect the upper resistor (RFBT) of the feedback divider to VOUT at the desired point of regulation. Connect the lower resistor (RFBB) of the feedback divider to GND.
For a fixed output version, connect the FB/BIAS pin directly to the VOUT pin. See also the Device Comparison Table. Do not float. Do not ground.
PG 9 A Open-drain power-good flag output. Connect to a suitable voltage supply through a current limiting resistor. High = power OK, low = power bad. The flag pulls low when EN = low. Can be left open when not used.
BOOT 10 P Bootstrap supply voltage for the internal high-side driver. Connect a high-quality 100nF capacitor from this pin to the SW pin.
SW 11, 12 P Regulator switch node. Connect to a power inductor.
EP THERMAL PAD Thermal Connect to system ground.
(1) A = Analog, P = Power, G = Ground