SPRAB89B September 2011 – August 2025
DWARF3 registers use register name operators (see Section 2.6.1 of the DWARF3 standard). The operand of a register name operator is a register number representing an architecture register. Table 12-1 defines mappings from DWARF3 register numbers/names to C6000 registers.
| DWARF Name | C6000 ISA Register | Description |
|---|---|---|
| 0-15 | A0-A15 | |
| 16-31 | B0-B15 | |
| 32 | Reserved | |
| 33 | PCE1 | E1 Phase Program Counter |
| 34 | IRP | Interrupt Return Pointer Register |
| 35 | IFR | Interrupt Flag Register |
| 36 | NRP | NMI Return Pointer Register |
| 37-52 | A16-A31 | |
| 53-68 | B16-B31 | |
| 69 | AMR | Address Mode Register |
| 70 | CST | Control Status Register |
| 71 | ISR | Interrupt Set Register |
| 72 | ICR | Interrupt Clear Register |
| 73 | IER | Interrupt Enable Register |
| 74 | ISTP | Interrupt Service Table Pointer Register |
| 75 | IN | Undocumented Control Register |
| 76 | OUT | Undocumented Control Register |
| 77 | ACR | Undocumented Control Register |
| 78 | ADR | Undocumented Control Register |
| 79 | FADCR | Floating-Point Adder Configuration Register |
| 80 | FAUCR | Floating-Point Auxiliary Configuration Register |
| 81 | FMCR | Floating-Point Multiplier Configuration Register |
| 82 | GFPGFR | Galois Field Polynomial Generator Function Register |
| 83 | DIER | Undocumented Control Register |
| 84 | REP | Restricted Entry Point Register |
| 85 | TSCL | Time Stamp Counter - Low Half |
| 86 | TSCH | Time Stamp Counter - High Half |
| 87 | ARP | Undocumented Control Register |
| 88 | ILC | SPLOOP Inner Loop Count Register |
| 89 | RILC | SPLOOP Reload Inner Loop Count Register |
| 90 | DNUM | DSP Core Number Register |
| 91 | SSR | Saturation Status Register |
| 92 | GPLYA | GMPY Polynomial - A Side Register |
| 93 | GPLYB | GMPY Polynomial - B Side Register |
| 94 | TSR | Task State Register |
| 95 | ITSR | Interrupt Task State Register |
| 96 | NTSR | NMI/Exception Task State Register |
| 97 | EFR | Exception Flag Register |
| 98 | ECR | Exception Clear Register |
| 99 | IERR | Internal Exception Report Register |
| 100 | DMSG | Undocumented Control Register |
| 101 | CMSG | Undocumented Control Register |
| 102 | DT_DMA_ADDR | Undocumented Control Register |
| 103 | DT_DMA_DATA | Undocumented Control Register |
| 104 | DT_DMA_CNTL | Undocumented Control Register |
| 105 | TCU_CNTL | Undocumented Control Register |
| 106 | RTDX_REC_CNTL | Undocumented Control Register |
| 107 | RTDX_XMT_CNTL | Undocumented Control Register |
| 108 | RTDX_CFG | Undocumented Control Register |
| 109 | RTDX_RDATA | Undocumented Control Register |
| 110 | RTDX_WDATA | Undocumented Control Register |
| 111 | RTDX_RADDR | Undocumented Control Register |
| 112 | RTDX_WADDR | Undocumented Control Register |
| 113 | MFREG0 | Undocumented Control Register |
| 114 | DBG_STAT | Undocumented Control Register |
| 115 | BRK_EN | Undocumented Control Register |
| 116 | HWBP0_CNT | Undocumented Control Register |
| 117 | HWBP0 | Undocumented Control Register |
| 118 | HWBP1 | Undocumented Control Register |
| 119 | HWBP2 | Undocumented Control Register |
| 120 | HWBP3 | Undocumented Control Register |
| 121 | OVERLAY | Undocumented Control Register |
| 122 | PC_PROF | Undocumented Control Register |
| 123 | ATSR | Undocumented Control Register |
| 124 | TRR | Undocumented Control Register |
| 125 | TCRR | Undocumented Control Register |
| 126 | DESR | Undocumented Control Register |
| 127 | DETR | Undocumented Control Register |
| 128 | STRM_HOLD | Undocumented Control Register |
| 129 | PDATA_O | Undocumented Control Register |
| 130 | TCR | Undocumented Control Register |