SPRACN9E september 2022 – may 2023 AM67 , AM67A , AM68 , AM68A , AM69 , AM69A , DRA829J , DRA829J-Q1 , DRA829V , DRA829V-Q1 , TDA4AEN-Q1 , TDA4VEN-Q1 , TDA4VM , TDA4VM-Q1
The Vix_DQS ratio and Vix_CK ratio for data write and CA bus simulations are to be verified, at the DRAM pin/BGA. Figure 3-4 from the JEDEC specification explains how to measure the Vix ratio, as well as define the ration requirement(s).
Symbol | Data Rate | Unit | Note | |||||
---|---|---|---|---|---|---|---|---|
1600/1867 | 2133/2400/3200 | 3733/4266 | ||||||
Vix_CK_ratio | - | 25 | - | 25 | - | 25 | % | (1), (2) |
Vix_DQS | - | 20 | - | 20 | - | 20 | % | (1), (2) |